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ML70Q5111LA Datasheet(PDF) 9 Page - OKI electronic componets |
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ML70Q5111LA Datasheet(HTML) 9 Page - OKI electronic componets |
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9 / 26 page  FEDL70Q5111LA-01 1Semiconductor ML70Q5111LA 9/26 TEST I/F Pin Name Direction Internal Pull Up/Down Initial Value Pin Placement Description TEST_L I — — [*4] Test pin (input) TEST_H I — — D4 Test pin (input) TEST_PU Oc — L B5 Test monitor pin VTM I — — C9 Test pin NC — — — A1, A13, N1, N13 No Connection Power, GND Pin Name Direction Internal Pull Up/Down Initial Value Pin Placement Description V DD — — — [*5] I/O power pin 3.3 V ±0.3 V LVDD — — — E4 I/O power pin 3.3 V ±0.3 V (Same voltage to the V DD for ML7050LA) GND — — — [*6] Digital block ground pin AVDD0 — — — E13 AVDD1 — — — C11 Analog block power pin 2.5 V ±0.25 V (Connect to REGOUT pin: F12) AGND0 — — — E11 AGND1 — — — A11 Analog block ground pin (Connect to REGGND pin: F13) REGVDD — — — E12 Regulator power pin (3.0 to 3.6 V) REGGND — — — F13 Regulator ground pin REGOUT — — — F12 Regulator output REGVBG — — — E10 Regulator reference voltage tuning [*4] TEST_L (TEST5): A8 TEST_L (TEST4): D8 TEST_L (TEST3): C8 TEST_L (TEST2): B7 TEST_L (TEST1): D7 TEST_L (TEST0): B6 TEST_L (PLLSEL): C10 TSET_L (PLLEN): A12 TSET_L (SVCO1): B3 [*5] C6, G1, K7, J12, H11, D12, L10 [*6] B11, C7, A6, A4, E2, F3, J2, N5, L6, M8, N12, H13, G12, F10, C12 |
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