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ML7074-004GA Datasheet(PDF) 6 Page - OKI electronic componets |
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ML7074-004GA Datasheet(HTML) 6 Page - OKI electronic componets |
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6 / 29 page  FEDL7074-003DIGEST-01 OKI Semiconductor ML7074-004GA 6/29 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Conditions Rating Unit Analog power supply voltage VDA −0.3 to 5.0 V Digital power supply voltage VDD −0.3 to 5.0 V Analog input voltage VAIN Analog pins −0.3 to V DD + 0.3 V VDIN1 Normal digital pins −0.3 to V DD + 0.3 V Digital input voltage VDIN2 5 V tolerant pins −0.3 to 6.0 V Storage temperature range Tstg −55 to +150 °C RECOMMENDED OPERATING CONDITIONS (Unless otherwise specified, AVDD = 3.0 to 3.6 V, DVDD0, 1, 2 = 3.0 to 3.6 V, AGND = DGND0, 1, 2 = 0.0 V, Ta = −20 to +60°C) Parameter Symbol Conditions Min. Typ. Max. Unit Analog power supply voltage VDA 3.0 3.3 3.6 V Digital power supply voltage VDD 3.0 3.3 3.6 V Operating temperature range Ta −20 60 °C VIH1 Digital input pins 2.0 VDD+ 0.3 V Digital high level input voltage VIH2 GPI0 and GPI1 pins 2.0 5.5 V Digital low level input voltage VIL Digital pins −0.3 0.8 V Digital input rise time tIR Digital pins 2 20 ns Digital input fall time tIF Digital pins 2 20 ns Digital output load capacitance CDL Digital pins 50 pF Capacitance of bypass capacitor for AVREF Cvref Between AVREF and AGND 2.2+0.1 4.7+0.1 µF Master clock frequency Fmck MCK −0.01% 4.096 +0.01% MHz PCM shift clock frequency Fbclk BCLK (at input) 64 2048 kHz PCM sync signal frequency Fsync SYNC (at input) 8.0 kHz Clock duty ratio DRCLK MCK, BCLK (at input) 40 50 60 % tBS BCLK to SYNC (at input) 100 ns PCM sync timing tSB SYNC to BCLK (at input) 100 ns PCM sync signal width tWS SYNC (at input) 1BCLK 100 µs |
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