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ML9044A-XXBCVWA Datasheet(PDF) 6 Page - OKI electronic componets |
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ML9044A-XXBCVWA Datasheet(HTML) 6 Page - OKI electronic componets |
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6 / 64 page  PEDL9044A-04 OKI Semiconductor ML9044A-xxA/xxB 6/64 Symbol Description T1, T2, T3 The input pins for test circuits (normally open). Each of these pins is equipped with a pull-down resistor, so this pin should be left open. VDD The power supply pin. GND The ground level input pin. S/ P The input pin to select the serial or parallel interface. “L” selects the parallel interface. “H” selects the serial interface. CS The pin to enable this IC in the serial l/F mode. “L” enables this IC. “H” disables this IC. This pin should be open in the parallel l/F mode. SHT The pin to input shift clock in the serial l/F mode. Data inputting to the SI pin is carried out synchronizing with the rising edge of this clock signal. Data outputting from the SO pin is carried out synchronizing with the falling edge of this clock signal. This pin should be open in the parallel l/F mode. Sl The pin to input DATA in the serial l/F mode. Data inputting to this pin is carried out synchronizing with the rising edge of the SHT signal. This pin should be open in the parallel l/F mode. SO The pin to output DATA in the serial l/F mode. Data inputting to this pin is carried out synchronizing with the falling edge of the SHT signal. This pin should be open in the parallel l/F mode. DUMMY NC pin. Leave this pin open. |
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