PEDL9371-01

OKI Semiconductor

ML9371

3/11

PIN DESCRIPTION

Symbol

Type

Description

D-GND

L-GND

—

D-GND is a ground pin for cathode driver circuit.

L-GND is a ground pin for logic circuit.

D-GND and L-GND should be connected outside the LSI.

RES

I

Input pin for register initialization signal.

When this pin is set low, the LSI enters the following initial setting states:

• Shift register outputs (POm): all “low” (m = 1 to 64)

• All cathode drive signal outputs (OUT1 to OUT64): “high impedance”

F/R

I

Input pin for data transfer direction select signal for shift register.

• When this pin is low, data is transferred starting at PO1 toward PO64.

• When this pin is high, data is transferred starting at PO64 toward PO1.

DATA I/O

I/O

Cathode scan data input-output pin.

When the

F/R pin is low, this pin is an input pin, and when it is high, this pin is an output

pin.

DATA O/I

I/O

Cathode scan data input-output pin.

When the

F/R pin is low, this pin is an output pin, and when it is high, this pin is an input

pin.

CLK I/O

I/O

Cathode scan data transfer clock input-output pin.

When the

F/R pin is low, this pin is an input pin, and when it is high, this pin is an output

pin.

CLK O/I

I/O

Cathode scan data transfer clock input-output pin.

When the

F/R pin is low, this pin is an output pin, and when it is high, this pin is an input

pin.

HZ

I

Input pin for cathode drive signal output control signal.

When this pin is low, all cathode drive signal outputs (OUT1 to OUT64) are high

impedance.

ALL H

I

Input pin for cathode drive signal output control signal.

When this pin is high, all cathode drive signal outputs (OUT1 to OUT64) are high.

ALL L

I

Input pin for cathode drive signal output control signal.

When this pin is high, all cathode drive signal outputs (OUT1 to OUT64) are low.

TEST

—

Pin for production tests. Leave this pin open or connect it to L-GND.

OUT 1 to 64

O

Cathode drive signal output pin.