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MIC9131 Datasheet(PDF) 11 Page - Micrel Semiconductor |
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MIC9131 Datasheet(HTML) 11 Page - Micrel Semiconductor |
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11 / 20 page  July 2001 11 MIC9131 MIC9131 Micrel together and either one can disable the gate drive pin and discharge the voltage on the soft start capacitor. V CC Undervoltage Lockout The V CC voltage is internally divided down and compared to a 1.21V internal bandgap reference. As V CC rises above the turn-on threshold, it disables the V CC undervoltage lockout circuit. Once above the turn-on threshold, hysteresis pre- vents the lockout circuit from disabling the IC until the V CC voltage falls below the lower threshold. Line Undervoltage Circuit (UVLO) The line voltage is monitored by an external resistor divider and fed into the negative input of the line UVLO comparator. As the comparator trip point is exceeded, the line UVLO circuit is disabled. Hysteresis built into the comparator pre- vents the circuit from toggling on an off in the presence of noise or a high input line impedance. The line voltage turn-on trip point is: VV R1 R2 R2 LINE_ON THRESHOLD =× + where: V THRESHOLD is the voltage level of the internal comparator reference, typically 1.21V. The line hysteresis is equal to: VV R1 R2 R2 HYSTERESIS HYST =× + where: V HYST is the internal hysteresis level, typically 75mV. V HYSTERESIS is the hysteresis of the line input voltage The MIC9131 will be disabled when the line voltage drops back down to: VV V LINE_OFF LINE_ON HYTERESIS =− = (VV ) R1+ R2 R2 THRESHOLD – HYST × Enable A low level on the enable pin turns off all the functions of the MIC9131 and places it in a low quiescent current state. The output driver is in a low state. When the enable pin is pulled high, the MIC9131 goes through its normal start up sequence including undervoltage lock out and soft start. When not used, the pin should be connected to V CC. Oscillator Block An external resistor and capacitor set the oscillator fre- quency. The MIC9131 contains an internal divide-by-four circuit that limits the maximum duty cycle at the gate drive to 75%. The oscillator frequency of the MIC9131 is four times the output switching frequency. Oscillator Pin The operation of the oscillator is shown in Figure 5. The voltage waveform at the OSC pin is a sawtooth whose amplitude increases as capacitor Cosc is charged up through R OSC from the 5VBIAS. When the OSC pin voltage reaches the internal comparator upper threshold, C OSC is quickly discharged to zero volts by an internal MOSFET. After a brief delay, typically 75ns, the internal MOSFET is turned off and the C OSC charges, repeating the cycle. Figure 5 show the relationship between the oscillator and gate drive waveforms. The delays in the IC force the duty cycle of the gate drive signal to be slightly less than 75% duty cycle. For V BIAS = 5V and a peak oscillator waveform voltage of 3V, the design equations simplify to: Charging t CHARGE tt RC =× × 092 . Discharging tC DISCHARGE t ≈× 40 MIC9131 S SET RESET R Q /Q LINE UVLO VCC UVLO VCC AGND VIN UVLO UVLO R1 1.21V R2 2 11 13 PGND 15 OUT 16 SS 4 µA 5V 12 Figure 4: UVLO and Soft Start Circuits |
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