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MB89F538-101 Datasheet(PDF) 7 Page - Fujitsu Component Limited. |
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MB89F538-101 Datasheet(HTML) 7 Page - Fujitsu Component Limited. |
7 / 62 page MB89530A Series 7 s PIN ASSIGNMENTS (Continued) (TOP VIEW) (DIP-64P-M01) (MDP-64C-P02) *1 : Pin 10 is MOD2 pin for MB89F538 and P47/INT27/ADST pins except for MB89F538. *2 : Pin 25 and pin 26 are P63/INT13, P64 pins for single-clock system and X0A, X1A pins for dual-clock system. *3 : The function of pin 57 depends on the model. For details, see “sPIN DESCRIPTIONS” and “sHANDLING DEVICES”. *4 : Package top pin assignments (MB89PV530 only) N.C. : Internal connection only. Not for use. Pin no. Pin name Pin no. Pin name Pin no. Pin name Pin no. Pin name 65 A15 73A181 O6 89A8 66 A12 74A082 O7 90 A13 67 A7 75 O1 83 O8 91 A14 68 A6 76 O2 84 CE 92 VCC 69 A5 77 O3 85 A10 70 A4 78 VSS 86 OE 71 A3 79 O4 87 A11 72 A2 80 O5 88 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 P36/WTO P37/PTO1 P40/INT20/EC P41/INT21/SCK2 P42/INT22/SO2/SDA P43/INT23/SI2/SCL P44/INT24/UCK2 P45/INT25/UO2 P46/INT26/UI2 P47/INT27/ADST/MOD2*1 P50/AN0 P51/AN1 P52/AN2 P53/AN3 P54/AN4 P55/AN5 P56/AN6 P57/AN7 AVCC AVR AVSS P60/INT10 P61/INT11 P62/INT12 P63/INT13/X0A*2 P64/X1A*2 RST MOD0 MOD1 X0 X1 VSS 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 VCC P35/PWC P34/PTO2 P33/SI1 (UI1) P32/SO1 (UO1) P31/SCK1 (UCK1) /LMCO P30/PPG03/MCO C/N.C. *3 P00 P01 P02 P03 P04 P05 P06 P07 P10 P11 P12 P13 P14 P15 P16 P17 P20/PWCK P21/PPG01 P22/PPG02 P23 P24 P25 P26 P27 92 91 90 89 88 87 86 85 84 83 82 81 80 79 65 66 67 68 69 70 71 72 73 74 75 76 77 78 VCC A14 A13 A8 A9 A11 OE A10 CE O8 O7 O6 O5 O4 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 VSS *4 |
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