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SY100E310JYTR Datasheet(PDF) 1 Page - Micrel Semiconductor |
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SY100E310JYTR Datasheet(HTML) 1 Page - Micrel Semiconductor |
1 / 6 page 1 SY100E310L Micrel, Inc. M9999-032206 hbwhelp@micrel.com or (408) 955-1690 DESCRIPTION s Guaranteed AC performance over temperature and voltage: • > 800MHz fMAX (typical) • < 50ps within-device skew s Low voltage operation: • LVPECL: +3.3V ±10% • LVECL: –3.3V ±10% s Internal 75k Ω pull-down resistors s Guaranteed over industrial temperature range: –40 °C to +85°C s Pin-for-pin, plug-in replacement for MC100LVE310 s Available in 28-pin PLCC package FEATURES 3.3V ECL/PECL 2:8 DIFFERENTIAL FANOUT BUFFER SY100E310L APPLICATIONS s Communications clock distribution s Redundant clock switchover s High-end server clock distribution Rev.: D Amendment: /0 Issue Date: March 2006 The SY100E310L is a 3.3V, precision 2:8 ECL/PECL fanout buffer optimized for precision low-skew clock distribution. The SY100E310L features fully differential clock paths to minimize both device and system skew resulting in skew performance of < 50ps. In addition, the device includes a 2:1 multiplexer input for redundant switchover applications. The SY100E310L is optimized for low voltage +3.3V LVPECL or –3.3V LVECL applications. Data sheets and support documentation can be found on Micrel’s web site at www.micrel.com. FUNCTIONAL BLOCK DIAGRAM Micrel Semiconductor On Semiconductor SY100E310LJI MC100LVE310FN SY100E310LJITR MC100LVE310FNR2 CROSS REFERENCE TABLE CLKA /CLKA /CLKB SEL CLKB Q0 /Q0 Q1 /Q1 Q2 /Q2 Q3 /Q3 Q4 /Q4 Q5 /Q5 Q6 /Q6 Q7 /Q7 VBB 0 100 200 300 400 500 600 700 800 900 CLK FREQUENCY (MHz) Output Swing vs. Frequency TYPICAL PERFORMANCE |
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