_______________________________________________________________________________________

9

GATE voltage is rapidly pulled up to full enhancement.

PGOOD is asserted 1.26ms after GATE is fully enhanced

ment), then a power-up to fault management fault has

turning off the power MOSFET and disconnecting the

load. PGOOD remains deasserted and the MAX5936/

MAX5937 enter the fault management mode.

When the power MOSFET is fully enhanced, the

circuit-breaker and short-circuit faults. The MAX5936/

the current-sense resistance to detect excessive current

through the load. The short-circuit threshold voltage,

are temperature-compensated (increasing with tempera-

ture) to track the normalized temperature coefficient of

When the load current is increased during full enhance-

rejection timer. At the end of the glitch rejection period,

and the part enters fault management. Alternatively,

there is no glitch rejection timer. GATE is immediately

enters fault management.

Figure 3. Load Probe Test During Initial Power-Up

40ms/div

20V/div

20V/div

20V/div

ALL VOLTAGES

REFERENCED TO GND

Figure 2. GATE Voltage Clamp During Power-Up

20V/div

1V/div

4ms/div

µF

Figure 4. MAX5936 Normal Condition

50V/div

50V/div

40ms/div

10V/div

50V/div

2A/div

Figure 5. MAX5936 Startup in Fault Condition

50V/div

50V/div

40ms/div

10V/div

50V/div

2A/div