DDU66C

5-TAP, HCMOS-INTERFACED

FIXED DELAY LINE

(SERIES DDU66C)

data

delay



3

FEATURES

PACKAGES

14

12

10

8

1

4

6

7

IN

T2

T4

GND

VDD

T1

T3

T5

•

Five equally spaced outputs

1

2

3

4

5

6

7

14

13

12

11

10

9

8

IN

N/C

N/C

T2

N/C

T4

GND

VDD

N/C

T1

N/C

T3

N/C

T5

•

Fits standard 14-pin DIP socket

•

Low profile

•

Auto-insertable

•

Input & outputs fully CMOS interfaced & buffered

•

10 T

DDU66C-xxD1

Com. SMD

DDU66C-xxD4

Com. SMD

DDU66C-xxMD1

Mil. SMD

DDU66C-xxMD4

Mil. SMD

DDU66C-xx

DIP

DDU66C-xxA2 Gull-Wing

DDU66C-xxB2 J-Lead

DDU66C-xxME7Military DIP

FUNCTIONAL DESCRIPTION

The DDU66C-series device is a 5-tap digitally buffered delay line. The

signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an

amount given by the device dash number. For dash numbers less than

40, the total delay of the line is measured from T1 to T5, with the nominal

value given by the dash number. The nominal tap-to-tap delay increment

is given by 1/4 of this number. The inherent delay from IN to T1 is nominally 8.0ns. For dash numbers

greater than or equal to 40, the total delay of the line is measured from IN to T5, with the nominal value

given by the dash number. The nominal tap-to-tap delay increment is given by 1/5 of this number.

PIN DESCRIPTIONS

IN

Signal Input

T1-T5 Tap Outputs

VDD

+5 Volts

GND

Ground

SERIES SPECIFICATIONS

DASH NUMBER SPECIFICATIONS

Part

Number

Total

Delay (ns)

Delay Per

Tap (ns)

DDU66C-10

10

± 2.0 *

2.5

± 1.0

DDU66C-20

20

± 2.0 *

5.0

± 2.0

DDU66C-50

50

± 3.0

10.0

± 3.0

DDU66C-60

60

± 3.0

12.0

± 3.0

DDU66C-75

75

± 4.0

15.0

± 3.0

DDU66C-100

100

± 5.0

20.0

± 3.0

DDU66C-125

125

± 6.5

25.0

± 3.0

DDU66C-150

150

± 7.5

30.0

± 3.0

DDU66C-175

175

± 8.0

35.0

± 4.0

DDU66C-200

200

± 10.0

40.0

± 4.0

DDU66C-250

250

± 12.5

50.0

± 5.0

* Total delay is referenced to first tap output

Input to first tap = 8.0ns

± 2ns

NOTE: Any dash number between 10 and 250 not

shown is also available.

•

Minimum input pulse width: 40% of total delay

•

Output rise time: 8ns typical

•

Supply voltage:

5VDC

± 5%

•

Supply current:

•

Operating temperature: 0

° to 70° C

•

Temp. coefficient of total delay: 300 PPM/

°C

25%

25%

25%

25%

VCC

GND

IN

T1

T2

T3

T4

T5

Functional diagram for dash numbers < 40

8.0ns

20%

20%

20%

20%

20%

VCC

GND

IN

T1

T2

T3

T4

T5

Functional diagram for dash numbers >= 40

1997 Data Delay Devices

Doc #97021

DATA DELAY DEVICES, INC.

1

2/5/97

3 Mt. Prospect Ave. Clifton, NJ 07013