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XC61FC2512MB Datasheet(PDF) 7 Page - Torex Semiconductor |
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XC61FC2512MB Datasheet(HTML) 7 Page - Torex Semiconductor |
7 / 12 page XC61F Series 163 2 ■Functional Description GFunctional Description ( CMOS output ) e w q r t y y ■タイミングチャート q When a voltage higher than the release voltage (VDR) is applied to the voltage input pin (VIN), the voltage will gradually fall. When a voltage higher than the detect voltage (VDF) is applied to VIN , output (VOUT) will be equal to the input at VIN. Note that high impedeance exists at VOUT with the N-channel open drain configuration. If the pin is pulled up, VOUT will be equal to the pull up voltage. w When VIN falls below VDF , VOUT will be equal to the ground voltage (VSS) level (detect state). Note that this also applies to N-channel open drain configurations. e When VIN falls to a level below that of the minimum operating voltage (VMIN ) output will become unstable. Because the output pin is generally pulled up with N-channel open drain configurations, output will be equal to pull up voltage. r When VIN rises above the VSS level (excepting levels lower than minimum operating voltage), VOUT will be equal to VSS until VIN reaches the VDR level. t Although VIN will rise to a level higher than VDR, VOUT maintains ground voltage level via the delay circuit. y Following transient delay time, VIN will be output at VOUT. Note that high impedeance exists with the N-channel open drain configuration and that voltage will be dependent on pull up. Notes : 1. The difference between VDR and VDF represents the hysteresis range. 2. Propagation delay time (tDLY) represents the time it takes for VIN to appear at VOUT once the said voltage has exceeded the VDR level. Input Voltage (VIN) Minimum Operating Voltage (VMIN) Detect Release Voltage (VDR) Detect Voltage (VDF) Output Voltage (VOUT) Ground Voltage (VSS) Ground Voltage (VSS) Propagation Delay Time (tDLY) GTiming Chart 02S_04XC61F 02.09.12 14:04 ページ 163 |
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