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WCMA1008C1X-TF70 Datasheet(PDF) 1 Page - Weida Semiconductor, Inc. |
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WCMA1008C1X-TF70 Datasheet(HTML) 1 Page - Weida Semiconductor, Inc. |
1 / 11 page 128K x 8 Static RAM WCMA1008C1X April 5, 2002 Features • Voltage Range — 4.5V–5.5V • Low active power — Typical active current: 6 mA @ f = fmax (70 ns speed) • Low standby current • Automatic power-down when deselected • TTL-compatible inputs and outputs • Easy memory expansion with CE1, CE2, and OE fea- tures • CMOS for optimum speed/power Functional Description The WCMA1008C1X is a high-performance CMOS static RAM organized as 128K words by 8 bits. Easy memory expan- sion is provided by an active LOW Chip Enable (CE1), an ac- tive HIGH Chip Enable (CE2), an active LOW Output Enable (OE), and three-state drivers. This device has an automatic power-down feature that reduces power consumption by more than 75% when deselected. Writing to the device is accomplished by taking Chip Enable 1 (CE1) and Write Enable (WE) inputs LOW and Chip Enable 2 (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16). Reading from the device is accomplished by taking Chip En- able 1 (CE1) and Output Enable (OE) LOW while forcing Write Enable (WE) and Chip Enable 2 (CE2) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW, CE2 HIGH, and WE LOW) The WCMA1008C1X is available in a standard 32-pin 450-mil-wide body width SOIC and 32-pin TSOP type I. Logic Block Diagram Pin Configuration 1 2 3 4 5 6 7 8 9 10 11 14 19 20 24 23 22 21 25 28 27 26 12 13 29 32 31 30 16 15 17 18 A16 A14 A12 A7 A6 A5 A4 A3 WE V CC A15 A13 A8 A 9 I/O7 I/O 6 I/O5 I/O4 A2 I/O0 I/O1 I/O2 CE OE A10 I/O A1 A0 A11 A18 Top View SOIC GND I/O3 A17 A6 A7 A16 A14 A12 WE VCC A4 A13 A8 A9 OE TSOP I Top View (not to scale) 1 6 2 3 4 5 7 32 27 31 30 29 28 26 21 25 24 23 22 19 20 I/O2 I/O1 GND I/O7 I/O4 I/O5 I/O6 I/O0 CE1 A11 A5 17 18 8 9 10 11 12 13 14 15 16 CE2 A15 NC A10 I/O3 A1 A0 A3 A2 25 I/O6 A1 A2 A3 A4 A5 A6 A7 A8 COLUMN DECODER INPUT BUFFER POWER DOWN WE OE I/O 0 CE2 I/O 1 I/O 2 I/O 3 512x 256x 8 ARRAY I/O 7 I/O 6 I/O 5 I/O 4 A0 CE1 |
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