ASAHI KASEI

[AK9813B]

DAD04E-01

2002/11

- 5 -

Data Configuration

AK9813B have a shift register in order to control the chip.

When the SEL pin is "H"(CS I/F), the shift register becomes 16bit configuration and the data on the

DI pin should be loaded with LSB first. When the SEL pin is "L"(LD I/F), the shift register becomes

14bit configuration and the data on the DI pin is loaded with MSB first.

The following description shows the configuration of the shift register.

The data set consist of 2-bits for the control of the internal EEPROM, 2-bits for the address of the

EEPROM (CS I/F only), 4-bits for select of D/A converter and 8-bits for the digital input data of the

8bit D/A converter and total data set is 16bits or 14bits.

①

Shift register configuration: SEL=High (CS I/F)

MSB

LSB

Last

First

A1

A0

CL

WR

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

EEPROM

ADDRESS

EEPROM

CONTROL

SELECTION FOR

D/A CONVERTER

DIGITAL INPUT DATA

FOR D/A CONVERTER

OUTPUT VOLTAGE FOR D/A CONVERTER

D7 D6 D5 D4 D3 D2 D1 D0

OUTPUT VOLTAGE

FOR D/A

A1

A0

EEPROM ADDRESS

0

0

0

0

0

0

0

0

≒

GND=VSS

0

0

ADDRESS: 0

0

0

0

0

0

0

0

1

≒

VDD/255 x 1

0

1

ADDRESS: 1

0

0

0

0

0

0

1

0

≒

VDD/255 x 2

1

0

ADDRESS: 2

1

1

ADDRESS: 3

1

1

1

1

1

1

1

0

≒

VDD/255 x 254

1

1

1

1

1

1

1

1

≒

VDD

D/A CONVERTER CHANNEL SELECTION

D11 D10

D9

D8

D/A CHANNEL

D11 D10

D9

D8

D/A CHANNEL

0

0

0

0

Don't Care

1

0

0

0

AO8

0

0

0

1

AO1

1

0

0

1

AO9

0

0

1

0

AO2

1

0

1

0

AO10

0

0

1

1

AO3

1

0

1

1

AO11

0

1

0

0

AO4

1

1

0

0

AO12

0

1

0

1

AO5

1

1

0

1

Can't use

0

1

1

0

AO6

1

1

1

0

Can't use

0

1

1

1

AO7

1

1

1

1

Don't Care

(NOTE) Above "Don't Care" state is valid only when AK9813B is in DAC mode or WRITE mode.

Refer to the following section "Instruction Set" about mode.