AKD4632 datasheet(9/48 Pages) AKM

Part #	AKD4632

Description	AK4632 Evaluation board Rev.0

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Manufacturer	AKM [Asahi Kasei Microsystems]

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9 / 48 page

ASAHI KASEI

[AKD4632-A]

2005/04

- 9 -

DIP Switch set up

[SW3] (MODE) : Mode Setting of AK4632 and AK4114

ON is “H”, OFF is “L”.

No.

Name

ON (“H”)

OFF (“L”)

1

DIF0

2

DIF1

3

CM2

AK4114 Audio Format Setting

See Table 2

4

CM0

5

CM1

Clock Operation Mode select

See Table 3

6

OCKS0

7

OCKS1

Master Clock Frequency Select

See Table 4

8

M/S

Master mode

Slave mode

Note. When the AK4632 is evaluated Master mode, “No.8 of SW3” is set to “H”.

Table 1. Mode Setting for AK4632 and AK4114

Register setting

for AK4632 Audio

Interface Format

Setting for AK4114 Audio Interface Format

DIF1 bit

DIF0 bit

DIF0

DIF1

DIF2

DAUX

SDTO

0

1

L

24bit, Left justified

16bit, Right justified

1

0

L

H

24bit, Left justified

Default

1

H

L

H

24bit, I

2S

24bit, I

2S

Note. When the AK4632 is evaluated by using DIR/DIT of AK4114, “No.8 of SW3” is set to “L”.

Table 2. Setting for AK4114 Audio Interface Format

Mode

CM1

CM0

UNLOCK

PLL

X'tal

Clock source

SDTO

0

-

ON

ON(Note)

PLL

RX

1

0

1

-

OFF

ON

X'tal

DAUX

0

ON

PLL

RX

2

1

0

1

ON

X'tal

DAUX

Default

3

1

-

ON

X'tal

DAUX

ON: Oscillation (Power-up), OFF: STOP (Power-down)

Note : When the X’tal is not used as clock comparison for fs detection (i.e. XTL1,0= “1,1”), the X’tal is off.

Table 3. Clock Operation Mode select

No.

OCKS1

MCKO1

MCKO2

X’tal

0

256fs

2

1

512fs

256fs

512fs

Default

Table 4. Master Clock Frequency Select (Stereo mode)

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