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TDA4916GG Datasheet(PDF) 7 Page - Infineon Technologies AG

Part No. TDA4916GG
Description  PWM-FF IC, SMPS IC with MOSFET Driver Output
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Maker  INFINEON [Infineon Technologies AG]
Homepage  http://www.infineon.com
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 7 page
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TDA 4916 GG
Version 2.0
7
1 May 1996
Circuit Description
The individual functional sections of the device and their interactions are described
below.
Power Supply at
V
S
The device does not enable the output until the turn-ON threshold of
V
S is exceeded. The
duty factor (active time/period) can then rise from zero to the value set with K1 in the time
determined by the soft start. The turn-OFF threshold lies below the turn-ON threshold.
Below the turn-OFF threshold the output Q SIP is reliably low.
Frequency Generator
The frequency is mainly determined by close-tolerance external components and the
calibrated reference voltage.
The switching frequency at the output can be set by suitable choice of
R
t and Ct.
The maximum possible duty factor can be reduced by a defined amount by means of a
resistor from
C
T to 0V GND. The maximum possible duty factor can be increased by a
defined amount by means of a resistor from
C
T to VS.
Ramp Generator
The ramp generator is controlled by the frequency generator and operates with the same
frequency. Capacitor
C
r on the ramp generator is discharged by an internally-set current
and charged via a current set externally. The duration of the falling edge of the ramp
generator output must be shorter than its rise time. Only then do the upper and lower
switching levels of the ramp generator signal have their nominal values.
In ā€œvoltage mode controlā€ operation, the rising edge of the ramp generator signal is
compared with an externally set dc voltage in comparator K1 for pulse-width control at
the output. The slope of the rising edge is set by the current through
R
r. The voltage
source connected to
R
r can be the SMPS input voltage. This makes it possible to control
the duty factor for a constant volt-second product at the output. This control option
(precontrol) permits equalization of known disturbances (e.g. input voltage ripple).
Superimposed load current control (current mode control) can also be implemented. For
this purpose the actual current at the source of the SIPMOS transistor is sensed and
compared with the specified value in comparator K5.




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