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VS-500-KFF-HNN622.0800 Datasheet(PDF) 2 Page - Vectron International, Inc |
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VS-500-KFF-HNN622.0800 Datasheet(HTML) 2 Page - Vectron International, Inc |
2 / 8 page VS-500 Voltage Controlled SAW Oscillator Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com Page 2 of 8 Rev: 14Nov03 Electrical Performance Parameter Symbol Minimum Typical Maximum Units Notes Frequency Nominal Frequency Absolute Pull Range Linearity Gain Transfer @ 155.52 MHz (See Pg 5/6) Gain Transfer @ 622.08 MHz (See Pg 5/6) Temperature Stability @ 155.52 MHz Temperature Stability @ 622.08 MHz fN APR Lin KV KV fSTAB fSTAB ±50 150 - 850 ±5 +691/+435 +434/+281 ±100 ±150 MHz ppm % ppm/V ppm/V ppm ppm 1,2,3 1,2,3,9/10 2,4,9/10 2,9/10 2,9/10 1,6 1,6 Supply Voltage Current (No Load) VCC ICC 2.97/4.5 3.3/5.0 55 3.63/5.5 80 V mA 2,3 3 Outputs Mid Level Swing Current Rise & Fall Time Symmetry Spurious Suppression Jitter @ 155.52 MHz (See Pg 5/6) Jitter @ 622.08 MHz (See Pg 5/6) IOUT tR, tF SYM φJ φJ VCC-1.5 45 50 VCC-1.3 850 250 50 60 0.440 0.230 VCC-1.1 20 400 55 V mV-pp mA ps % dBc ps-rms ps-rms 2,3 2,3 6 5,6 2,3 6 6,7 6,8 Control Voltage Input Impedance (LV-PECL or PECL) Input Impedance (ECL) Modulation Bandwidth Zc Zc BW 100 10 500 k Ω k Ω kHz 6 6 6 Operating Temperature TOP -40 85 °C 1,3 Package Size 9.0 x 14.0 x 4.5 mm 1. See Standard Frequencies and Ordering Information (Pg 8). 2. Parameters are tested with production test circuit below (Fig 2). 3. Parameters are tested at ambient temperature with test limits guardbanded for specified operating temperature. 4. Measured as the maximum deviation from the best straight-line fit, per MIL-0-55310. 5. Measured from 20% to 80% of a full output swing (Fig 1). 6. Not tested in production, guaranteed by design, verified at qualification. 7. Integrated across 12 kHz to 20 MHz, per GR-253-CORE Issue3. 8. Integrated across 50 kHz to 80 MHz, per GR-253-CORE Issue3. 9. Tested with Vc = 0.3V to 3.0V. 10. Tested with Vc = 0.5V to 4.5V. Figure 1. 10K LV-PECL Waveform Figure 2. 3.3V Test Circuit Vcc - 1.6V Vcc - 1.3V Vcc - 1.0V 80% 20% tR tF tA tB SYM = 100 x tA/ tB 2 5 50 Ω 50 Ω Test Circuit Notes: 1) To Permit 50 Ω Measurement of Outputs, all DC Inputs are Biased Down 1.3V. 2) All Voltage Sources Contain Bypass Capacitors to Minimize Supply Noise. 3) 50 Ω Terminations are Within Test Equipment. (-1.3V to +2V) (-1.3V, Open) (-1.3V) (+2V) COutput Output Disable, Enable 1 6 3 4 |
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