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SP9602 Datasheet(PDF) 8 Page - Sipex Corporation |
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SP9602 Datasheet(HTML) 8 Page - Sipex Corporation |
8 / 11 page SP9602DS/02 SP9602 Dual, 12-Bit, Low Power Voltage Output D/A Converter © Copyright 1999 Sipex Corporation 8 H L H L H L CLR XFER WR2 140ns, t H L H L H L WR2 CS WR1 140ns, t Data Transfer from Input Register to DAC's Loads Input Data to First Set of Latches WR XFER Figure 4. Timing Figure 3. Latch Control Options — (Top) Semi–Transparent Latch Mode; (Bottom) Fully–Transparent Latch Mode 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 N.C. VOUT2 VSS VDD CLR REF IN 2 GND B1/B2 A REF IN1 XFER WR2 WR1 CS N.C. DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8 DB9 DB10 DB11 VOUT1 SP9602 +5V –5V 12–Bit Data Bus VOUT2 VOUT1 +3V References GND Address Decode & Control 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 N.C. VOUT2 VSS VDD CLR REF IN 2 GND B1/B2 A REF IN1 XFER WR2 WR1 CS N.C. DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8 DB9 DB10 DB11 VOUT1 SP9602 +5V –5V 12–Bit Data Bus VOUT2 VOUT1 +3V References GND Address Decode & Control DAC Strobe |
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