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LNK564PN Datasheet(PDF) 7 Page - Power Integrations, Inc. |
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LNK564PN Datasheet(HTML) 7 Page - Power Integrations, Inc. |
7 / 16 page 7 LNK562-564 F 10/05 Y Capacitor The placement of the Y capacitor should be directly from the primary input filter capacitor positive terminal to the common/ return terminal of the transformer secondary. Such a placement will route high magnitude common-mode surge currents away from the LinkSwitch-LP device. Note: If an input pi (C, L, C) EMI filter is used, then the inductor in the filter should be placed between the negative terminals on the input filter capacitors. Output Diode For best performance, the area of the loop connecting the secondary winding, the output diode and the output filter capacitor should be minimized. In addition, sufficient copper area should be provided at the anode and cathode terminals of the diode for heat sinking. A larger area is preferred at the quiet cathode terminal. A large anode area can increase high- frequency radiated EMI. Quick Design Checklist As with any power supply design, all LinkSwitch-LP designs should be verified on the bench to make sure that component specifications are not exceeded under worst-case conditions. The following minimum set of tests is strongly recommended: 1. Maximum drain voltage – Verify that V DS does not exceed 650 V at the highest input voltage and peak (overload) output power. A 50 V margin to the 700 V BV DSS specification gives margin for design variation, especially in Clampless designs. 2. Maximum drain current – At maximum ambient temperature, maximum input voltage and peak output (overload) power, verify drain current waveforms for any signs of transformer saturation and excessive leading-edge current spikes at startup. Repeat under steady state conditions and verify that the leading-edge current spike event is below I LIMIT(MIN) at the end of the tLEB(MIN). Under all conditions, the maximum DRAIN current should be below the specified absolute maximum ratings. 3. Thermal Check – At specified maximum output power, minimum input voltage and maximum ambient temperature, verify that the temperature specifications are not exceeded for LinkSwitch-LP, transformer, output diode and output capacitors. Enough thermal margin should be allowed for part-to-part variation of the R DS(ON) of LinkSwitch-LPasspecifiedinthedatasheet.Underlowlineand maximum power, a maximum LinkSwitch-LP SOURCE pin temperature of 100 °C is recommended to allow for these variations. Design Tools Up-to-date information on design tools can be found at the Power Integrations web site: www.powerint.com. |
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