S24163S2.7 datasheet(2/12 Pages) SUMMIT

Part #	S24163S2.7

Description	Precision RESET Controller with 16K I2C Memory

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Manufacturer	SUMMIT [Summit Microelectronics, Inc.]

Direct Link	http://www.summitmicro.com

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S24163

2014 2.1 8/2/00

ENDURANCE AND DATA RETENTION

The S24163 is designed for applications requiring up to

100,000 erase/write cycles and unlimited read cycles. It

provides 100 years of secure data retention, with or without

power applied, after the execution of 100,000 erase/write

cycles.

APPLICATIONS

The S24163 is ideal for applications requiring low voltage

and low power consumption. This device provides

microcontroller RESET control and can be manually

resettable. This device also uses a cost effective, space-

saving, 8-pin SOIC or PDIP plastic package. Typical

applications include alarm devices, electronic locks,

meters, keys, pagers and cellular phones.

RESET CONTROLLER DESCRIPTION

The device provides a precise reset output to a

microcontroller and it’s associated circuitry ensuring cor-

rect system operation during power-up/down conditions

and brownout situations. The output is open drain, allow-

ing control of the reset function by multiple devices.

During power-up the reset output remains in a fixed active

state until VCC passes through the reset threshold and

remains above the threshold for 200ms. The reset output

is valid whenever VCC

≥ 1V. If VCC falls below the

threshold for more than tGLITCH the device will immediately

generate a reset and drive the output.

The reset pin is an I/O; therefore, forcing the pin to the

active state can also manually reset the device. Because

the I/O needs to be an open drain, the internal timer can

only be triggered by the leading edge of the input. The

resulting reset output will either be tPURST, or the exter-

nally applied reset signal, whichever is longer. This can

provide an affective debounce or reset signal extender

solution.

CHARACTERISTICS OF THE I2C BUS

General Description

The I2C bus was designed for two-way, two-line serial

communication between different integrated circuits. The

two lines are a serial data line (SDA), and a serial clock line

(SCL). The SDA line must be connected to a positive

supply by a pull-up resistor, located somewhere on the

bus (See Figure 1). Data transfer between devices may

be initiated with a START condition only when SCL and

SDA are HIGH (bus is not busy).

PIN DESCRIPTIONS

SCL — Serial Clock: The SCL input is used to clock data

into and out of the device. In the WRITE mode data must

remain stable while SCL is HIGH. In the READ mode data

is clocked out on the falling edge of SCL.

SDA — Serial Data: The SDA pin is a bidirectional pin

used to transfer data into and out of the device. Data may

change only when SCL is LOW, except START and STOP

conditions. It is an open-drain output and may be wire-

ORed with any number of open-drain or open-collector

outputs.

RESET# — Reset: This is an active low open drain output.

It is driven low whenever VCC is below VTRIP. It is also an

input and can be used to debounce a switch input or

perform signal conditioning. The pin has an internal pull-up

and should be left unconnected if the signal is not used in

the system. However, an external pull-up resistor must be

connected when the pin is tied to a system RESET# line.

VCC — Power: VCC is the voltage input, typically 2.7 to 5.5

volts.

GND — Ground: Power return.

NC — No Connect: The no connect inputs are not used.

However, to ensure proper operation, they can be uncon-

nected or tied to ground. They must not be tied to VCC.

PIN CONFIGURATION

NC

RESET#

NC

VSS

VCC

NC

SCL

SDA

1

2

3

4

8

7

6

5

SMS24163

8-Pin PDIP

or 8-Pin SOIC

2014 T PCon 2.0

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S24163S2.7 Datasheet(PDF) 2 Page - Summit Microelectronics, Inc.

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