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SMH4814SCR01 Datasheet(PDF) 2 Page - Summit Microelectronics, Inc. |
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SMH4814SCR01 Datasheet(HTML) 2 Page - Summit Microelectronics, Inc. |
2 / 44 page SMH4814 Preliminary Information Summit Microelectronics, Inc 2080 2.0 07/21/05 2 GENERAL DESCRIPTION The SMH4814 integrated power controller operates within a wide supply range, typically –32 to –72 volts, and generates the signals necessary to drive isolated- output DC/DC converters. The device accepts two independent –48V feeds via input pins FEEDA and FEEDB. The VGATEA pin controls the flow of power from FEEDA to the load. The VGATEB pin controls the flow of power from FEEDB to the load. The SMH4814 continuously monitors the voltage on FEEDA and FEEDB. The supply arbitration block in Figure 2 selects which pin drives power to the device based on the voltage level on each pin and the acceptable voltage range. Once the FEEDA or FEEDB pin is selected the SMH4814 asserts the corresponding VGATE pin. The assertion of this pin turns on the external low-RDSON FETs to supply power to the load. Start-up Procedure The general start-up procedure is as follows: 1. A physical connection must be made with the chassis to discharge any electrostatic voltage potentials when a typical add-in board is inserted into the powered backplane. 2. The board then contacts the long pins on the backplane that provide power and ground. 3. As soon as power is applied the device starts up, but it does not immediately apply power to the output load. 4. Under-voltage and over-voltage circuits inside the controller verify that the input voltage is within a user-specified range. 5. The SMH4814 senses the PD1 and PD0 pin detection signals to indicate the card is seated properly. These requirements must be met for a Pin Detect Delay period of tPDD. Once this time has elapsed the hot-swap controller enables VGATE_HS to turn on the external power MOSFET switch. The VGATE_HS output is current limited to IVGATE, allowing the slew rate to be easily modified using external passive components. During the controlled turn-on period the VDS of the MOSFET is monitored by the DRAIN SENSE input. When DRAIN SENSE drops below 2.5V, and VGATE_HS rises above V12 – VGT, the SMH4814 asserts the PUPA through PUPD power good outputs to enable the DC/DC controllers. Steady-state operation is maintained as long as all conditions are normal. Any of the following events may cause the device to disable the DC/DC controllers by shutting down the power MOSFETs: An under-voltage or over-voltage condition on the host power supply. A failure of the power MOSFET sensed via the DRAIN SENSE pin. The PD1/PD0 pin detect signals becoming invalid. The master enable (EN/TS) falls below 2.5V. Any of the FB inputs driven low by events on the secondary side of the DC/DC controllers. The occurrence of an overcurrent. The SMH4814 may be configured so that after any of these events occurs the VGATE output shuts off, and either latches into an off state or recycles power after a cooling down period, tCYC. Powering V12 The SMH4814 contains an internal shunt regulator on the V12 pin that prevents the voltage from exceeding 12V. It is necessary to use a dropping resistor (RD) between the host power supply and the V12 pin in order to limit current into the device and prevent possible damage. The dropping resistor allows the device to operate across a wide range of system supply voltages, typically –32 V to –72V, and also helps protect the device against common-mode power surges. Refer to the Applications Section for help on calculating the RD resistance value. |
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