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SMM105NER05 Datasheet(PDF) 3 Page - Summit Microelectronics, Inc. |
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SMM105NER05 Datasheet(HTML) 3 Page - Summit Microelectronics, Inc. |
3 / 21 page SMM105 Preliminary Information Summit Microelectronics, Inc 2068 1.8 09/20/05 3 WP# A0 A1 A2 SDA SCL VREF_CNTL TRIM TRIM_CAP V+ V- VM 12VIN VDD_CAP VDD READY START COMP1 COMP2 OV/UV OV/UV FAULT# Output Control MUX V REF Input Voltage Sensing and Signal Conditioning EE Configuration Registers & M emory I2C Serial Interface 3.6/5V Regulator Trim Drive Supply Arbitration Figure 3 – SMM105 Controller Internal Block Diagram. PACKAGE AND PIN CONFIGURATION 1 28 21 20 19 18 17 16 15 22 23 24 25 26 27 2 3 4 5 6 7 14 13 SMM105 Pin 1 SCL A2 START A1 READY A0 GND VDD TRIM COMP1 TRIM_CAP NC NC NC 12 11 10 9 8 INTERNAL BLOCK DIAGRAM 28 Pin QFN Top View A1 A2 A4 A3 B1 B2 B4 B3 C1 C2 C4 C3 D1 D2 D4 D3 E1 E2 E4 E3 SCL A2 VDD_CAP VDD START SDA TRIM A1 READY NC NC GND VREF_CNTL FAULT# NC WP# FILT_CAP COMP2 VM Pin 1 A5 B5 C5 D5 E5 12VIN COMP1 TRIM_CAP NC NC A0 25 Ball Ultra CSP TM Bottom View |
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