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SMS64FR01 Datasheet(PDF) 4 Page - Summit Microelectronics, Inc. |
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SMS64FR01 Datasheet(HTML) 4 Page - Summit Microelectronics, Inc. |
4 / 24 page SMS64 Preliminary Summit Microelectronics, Inc 2060 2.22 10/09/03 4 PIN DESCRIPTIONS Pin Number Pin Type Pin Name Pin Description 6 PWR VCCA 5 PWR VCCB 4 PWR VCCC 3 PWR VCCD 2 PWR VCCE 1 PWR VCCF The VCC inputs have two functions on the SMS64. They are used as the power supply inputs and as such are diode-OR’ed so that at any point in time the highest potential input will be the power source for the SMS64. So long as one of the inputs is at or above 1V the RESET outputs will be active. For proper device operation, including sequencing, at least one of the pins must be at or above 2.7V. Each VCC input can be programmed as a voltage sensing input. It will only be used as a precursor to power-on sequencing. Once it reaches its VPTH the comparator’s source input will be switched to its corresponding VM input. 7 PWR VCC_CAP VCC_CAP is a charge storage connection to the SMS64’s internal power supply. For most applications this pin is tied to a 10µF capacitor. 10 I A2 11 I A1 The address pins are biased either to VCC_CAP or GND. When communicating with the SMS64 over the 2-wire bus these pins provide a mechanism for assigning a unique bus address. A2 and A1 are internally connected to VCC through a 100K Ω resistor. 12 I CS# The Chip Select input is used solely for enabling communication on the 2-wire bus. In order to write or read the registers or the memory array the CS# input must be low. CS# is internally connected to VCC through a 100K Ω resistor. 13 I SCL The SCL input is used to clock data into and out of the memory array. In the write mode, data must remain stable while SCL is HIGH. In the read mode, data is clocked out on the falling edge of SCL. 14 I/O SDA SDA is the bidirectional serial data pin. It is configured as an open drain output and will require a pull-up resistor to VCC_CAP or a higher potential system supply. 15 PWR GND GND is the ground for both the analog and digital portions of the internal circuitry. It is internally tied to pin 24. (Both pins should be tied to system ground). 16 I FS# The force shutdown input is used to immediately turn off all PUP outputs. FS# is internally connected to VCC through a 100K Ω resistor. 17 I PWR_ ON/OFF The PWR_ON/OFF input is used to initiate power-on and power-off sequencing. When the input is high and all of the programmed preconditions are met, the SMS64 will power-on. If the input is taken low, the SMS64 will begin the power-off operation. If programmed to do so, the SMS64 will sequence off the PUP outputs either in the power-on order or reverse order. PWR_ON/OFF is internally connected to VDD through a 100K Ω resistor. 18 I MR# MR# is the manual reset input. When MR# is taken low the RST_A# and RST_B# outputs will be driven low. The RST outputs will stay low so long as the MR# input is low, and will remain low for tPRTO after MR# returns high (so long as no other reset conditions exist). MR# must be low in order to write to the configuration registers and high to write to the memory array (see descriptions on page 16). MR# is internally connected to VCC through a 100k Ω pull-up resistor. PIN DESCRIPTIONS |
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