G -LINK
GLT4160L04
4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
May 2001 (Rev.3.1)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD, IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
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Notes:
1. Measure with a load equivalent to one TTL input and 100 pF.
2. Assumes that tRCD
≤ t
RCD (max.). If tRCD is greater than tRCD (max.), access time will be tAA
dominant.
3. Assumes that tRAD
≤ t
RAD (max.). If tRAD is greater than tRCD (max.), access time will be
controlled by tCAC.
4. Either tRRH or tRCH must be satisfied for a Read Cycle.
5. Access time is determined by the longest of tAA, tCAC and tCPA.
6. Assumes that tRAD
≥ t
RAD (max.).
7. Operation within the tRAD (max.) limit ensures that tRAC (max.) can be met. tRAD (max.)
is specified as a reference point only. If tRAD is greater than the specified tRAD (max.)
limit, the access time is controlled by tCAA and tCAC.
8. tWCS, tRWD, tAWD and tCWD are not restrictive operating parameters.
9. tWCS (min.) must be satisfied in an Early Write Cycle.
10. tDS and tDH are referenced to the latter occurrence of CAS or WE .
11. tT is measured between VIH (min.) and VIL (max.). AC-measurements assume tT = 2 ns.
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