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GLT4160L04E-50J3 Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers

Part # GLT4160L04E-50J3
Description  4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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GLT4160L04E-50J3 Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers

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G -LINK
GLT4160L04
4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
May 2001 (Rev.3.1)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD, IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 1 -
Features :
Description :
4,194,304 words by 4 bits organization.
Fast access time and cycle time
Low power dissipation.
Read-Modify-Write, RAS -Only Refresh,
CAS -Before- RAS Refresh, Hidden Refresh.
2,048 refresh cycles per 32ms.
Available in 300 mil 26(24) SOJ and TSOPII.
∗ 3.3V±0.3V Vcc Power Supply voltage.
All inputs and Outputs are LVTTL compatible.
Extended Data-Out (EDO) Page access
cycle.
∗ Self-refresh Capability. (S-Version).
The GLT4160L04 is a high-performance
CMOS dynamic random access memory
containing 16,777,216 bits organized in a x4
configuration. The GLT4160L04 offers page
cycle access with Extended Data Output.
The GLT4160L04 has 11 row- and 11
column-addresses, and accepts 2048-cycle
refresh in 32 ms.
The GLT4160L04 provides EDO PAGE
MODE operation which allows for fast data
access
within
a
row-address
defined
boundary, up to 2048 x 4 bits with cycle
times as short as 18ns.
HIGH PERFORMANCE
40
50
60
70
Max. RAS Access Time, (tRAC)
40 ns
50 ns
60 ns
70 ns
Max. Column Address Access Time, (tAA)
20 ns
25 ns
30 ns
35 ns
Min. Extended Data Out Page Mode Cycle Time, (tPC)
18 ns
20 ns
25 ns
30 ns
Min. Read/Write Cycle Time, (tRC)
70 ns
84 ns
104 ns 124 ns
Max. CAS Access Time (tCAC)
12 ns
13 ns
15 ns
20 ns


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