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M5M5V408BKV-10HW Datasheet(PDF) 5 Page - Mitsubishi Electric Semiconductor |
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M5M5V408BKV-10HW Datasheet(HTML) 5 Page - Mitsubishi Electric Semiconductor |
5 / 14 page MITSUBISHI ELECTRIC M5M5V408BFP/TP/RT/KV/KR revision-K1.0e, ' 98.09.07 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM MITSUBISHI LSIs Output disable time after OE high Output enable time after S low Output enable time after OE low Output disable time after S high 5 tCR ns ta(S) ta(OE) tdis(S) tdis(OE) ten(S) ten(OE) tV(A) ta(A) 35 35 100 75 0 85 85 40 0 0 5 5 1TTL CL DQ 85 10 5 10 85 85 45 30 30 30 85 60 0 70 70 35 0 0 5 5 tCW tw(W) tsu(A) tsu(A-WH) tsu(S) tsu(D) th(D) trec(W) tdis(W) tdis(OE) ten(W) ten(OE) 100 10 5 10 100 100 50 35 35 30 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Input rise time and fall time Reference level Output loads 2.7V~3.6V VIH=2.4V,VIL=0.4V VOH=VOL=1.5V Transition is measured ±500mV from steady state voltage.(for ten,tdis) 5ns Fig.1,CL=30pF CL=5pF (for ten,tdis) AC ELECTRICAL CHARACTERISTICS (Vcc=2.7 ~ 3.6V, unless otherwise noted) (1) TEST CONDITIONS (2) READ CYCLE Symbol Parameter Limits Units Max Min Max Min Read cycle time Address access time Chip select access time Output enable access time Data valid time after address (3) WRITE CYCLE Symbol Parameter Limits Max Min Max Min Units Write cycle time Write pulse width Address set up time Address set up time with respect to W high Chip select set up time Data set up time Data hold time Write recovery time Output disable time after W low Output disable time after OE high Output enable time after W high Output enable time after OE low Supply voltage Input pulse Fig.1 Output load Including scope and jig capacitance M5M5V408B FP,TP,RT,KV,KR-85 M5M5V408B FP,TP,RT,KV,KR-10 M5M5V408B FP,TP,RT,KV,KR-85 M5M5V408B FP,TP,RT,KV,KR-10 |
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