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M65669FP Datasheet(PDF) 8 Page - Mitsubishi Electric Semiconductor |
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M65669FP Datasheet(HTML) 8 Page - Mitsubishi Electric Semiconductor |
8 / 15 page M65669SP/FP MITSUBISHI DIGITAL TV ICs PICTURE-IN-PICTURE SIGNAL PROCESSING PRELIMINARY Notice ; This is not the final specification. Some of information in this document are subject to changes. V3.1 ( / ) 15 Internal register information (preliminary) 00h <7> DISP Sub picture display : [0] off, [1] on <6> SIZE_V Sub picture vertical size : [0] 1/9, [1] 1/16 <5> SIZE_H Sub picture horizontal size : [0] 1/9, [1] 1/16 <4> WEN Sub picture : [0] Still, [1] Moving <3> BGC Back ground display : [0] off, [1] on <2> BGCS Sub picture mute : [0] off, [1] on <1> FREE_RUN VCXO ocsilation : [0] Lock, [1] Free run <0> RVS HD / VD input synchronous mode selection : [0] sync., [1] async. 01h <7:0> VXA<7:0> Sub picture vertical position 02h <7:0> HXA<7:0> Sub picture horizontal position 03h <7> KILLER Sub picture color killer : [0] enable, [1] disable <6:0> U_DAC<6:0> Sub picture U or G DAC output amplitude control 04h <5:0> TINT<5:0> Sub picture tint control 05h <7> GRC Frame display : [0] off, [1] on <6:0> CONTRAST<6:0> Sub picture Y or R DAC output amplitude control 06h EXT_SC_SEL<1:0> Sub picture C-Sync sep. input selection : [0] Digital, [1] 23 pin input, [2] external (18 pin input), [3] Int. analog 07h <7:6> <5:0> BG_START<5:0> Sub picture BGP position setting 08h DCONT<1:0> Sub picture digital sync sep.threshold setting <3:0> YDL<3:0> Sub picture Y/C delay adjust 09h <7:4> ADJ<3:0> Main/Sub switch delay control 0Ah DECODE Sub picture color decoder reset : [1] reset 0Bh <7:5> BGBY<2:0> Back ground U level setting <4:0> Y_OFFSET<4:0> Sub picture Y bright control 0Ch <6:4> BGRY<2:0> Back ground V level setting <3:0> BGY<3:0> Back ground Y level setting 0Dh <7> VCHIP_ONLY V-chip decode mode : [0] off, [1] on <3:0> 0Eh 0Fh <7:6> SYNC_DELAY<1:0> Sub picture sync.delay control <5:4> MVP_SEL<1:0> <3> C_GAIN_SEL Sub picture chroma : [0] x1, [1] x2 <2:0> INVLEVEL<2:0> AFCBITSEL Sub picture AFC time constant : [0] x2, [1] x1 <6> <7> BITSEL Sub picture Y clamp time constant : [0] x2, [1] x1 symbol remarks 8 <7> <6> YUVN_RGB_SEL <5:4> <3:0> HT<3:0> Sub picture display timing adjust <7:6> EXPORT<1:0> Ext. port setting (7 pin) : [0or1] Sub BGP, [2]"0" output, [3]"1" output <7:4> PEDESTU<3:0> Sub picture V pedestal level (2's comp) PEDESTV<3:0> Sub picture U pedestal level (2's comp) <5:0> ACC_LEVEL<5:0> Sub picture color decoder amplitude <7> UV_FILTER_OFF <6> SET_ACC Address 0Dh, 0Eh setting mode : [0]default, [1] enable to set <5:4> SYSTEM_MODE<1:0> System : [0]NTSC , [1]PAL-M, [2]PAL-N, [3] N.A. SET_SIZE Address 11h, 12h, 13h, 14h setting mode : [0]default, [1] enable to set <3> SET_VCHIP Address 15h, 16h, 17h setting mode : [0]default , [1] enable to set <2> INV_UV Invert U, V output value : [0] normal, [1] invert <1> CROSS_SEL Sub picture read mode : [0] pixel based, [1] H based <0> <7> AUTO_ENABLE System automatic judgment : [0] off, [1] on <6> BURST_CLOCK_MODE VCXO mode selection : [0] 1H based, [1] 2H based <5> <4> INV_WFF Invert sub picture field definition : [0] normal, [1] invert <3> INV_RFF Invert main picture field definition : [0] normal, [1] invert <2> ERRSEL for test : 0 set only <1> PIP output mode selection : [0] YUV, [1] RGB Sub picture decoder macro vision mode selection Sub picture decoder macro vision mode threshold bit address Reset val.1/9 ex. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 0 FFh FFh 20h 20h 33h 32h 33h 32h 1 00h 00h 0 0 3h Ah 2h 2h 0Eh 0Eh 0h 0h 0h 0h 0 0 0h 0 0 0 0 0 0 0h 0 0 0 0 0h 0h Ch Ch 0 0 0 0 0 0 0 0 0h 0h 0 0h 0 0 15h 2h 7h Fh 2h 0h 0h 0Fh 0Fh 0h 0h PALN_ENABLE Main picture PAL-N : [0] enable, [1] disable <0> RFF_FIX AUTO_RFF_FIX Automatic 50/60Hz Judgement : [0] enable, [1] disable 0 0 Main picture field fix : [0] not fix, [1]fix Sub picture U, V output filter : [0]on, [1]off |
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