10

AT24HC02B

5134A–SEEPR–9/05

Read Operations

Read operations are initiated the same way as write operations with the exception that

the read/write select bit in the device address word is set to “1”. There are three read

operations: current address read, random address read and sequential read.

CURRENT ADDRESS READ: The internal data word address counter maintains the

last address accessed during the last read or write operation, incremented by one. This

address stays valid between operations as long as the chip power is maintained. The

address “roll over” during read is from the last byte of the last memory page to the first

byte of the first page. The address “roll over” during write is from the last byte of the cur-

rent page to the first byte of the same page.

Once the device address with the read/write select bit set to “1” is clocked in and

acknowledged by the EEPROM, the current address data word is serially clocked out.

The microcontroller does not respond with an input “0” but does generate a following

stop condition, see Figure 10.

Figure 10. Current Address Read

RANDOM READ: A random read requires a “dummy” byte write sequence to load in the

data word address. Once the device address word and data word address are clocked

in and acknowledged by the EEPROM, the microcontroller must generate another start

condition. The microcontroller now initiates a current address read by sending a device

address with the read/write select bit high. The EEPROM acknowledges the device

address and serially clocks out the data word. The microcontroller does not respond

with a “0” but does generate a following stop condition, see Figure 11.

Figure 11. Random Read

SEQUENTIAL READ: Sequential reads are initiated by either a current address read or

a random address read. After the microcontroller receives a data word, it responds with

an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to

increment the data word address and serially clock out sequential data words. When the

memory address limit is reached, the data word address will “roll over” and the sequen-

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