1

PS8667A

10/04/04

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LVDS High-Speed Differential

Line Receivers

Features

• Signaling Rates >400Mbps (200 MHz)

• Single 3.3V Power Supply Design

• Accepts ±350mV (typical) Differential Swing

• Maximum Differential Skew of 0.35ns

• Integrated110-OhmterminationonPI90LVTxxxx

• Maximum Propagation Delay of 4.7ns

• Low Voltage TTL (LVTTL) Outputs

• Industrial Temperature Operating Range: -40°C to 85°C

• Open, Short, and Terminated Fail Safe

• Meets or Exceeds ANSI/TIA/EIA-644 LVDS Standard

• Packaging (Pb-free & Green available):

-16-PinTSSOP(L)

-16-PinSOIC(W)

-8-PinSOIC(W)

-8-PinMSOP(U)

PI90LV/LVT3486

PI90LV/LVT9637

PI90LV3486/PI90LVT3486

PI90LV9637/PI90LVT9637

Description

The PI90LV/LVT3486 and PI90LV/LVT9637 are differential line

receivers that use low-voltage differential signaling (LVDS) to

support data rates in excess of 400 Mbps. These products are

designed for applications requiring high-speed, low-power con-

sumption and low noise generation.

A differential input signal (350mV) is translated by the device to 3V

CMOS output level.

Applications

Applications include point-to-point and multidrop baseband data

transmission over controlled impedance media of approximately

100-ohms. The transmission media can be printed circuit board

traces, backplanes, or cables.

ThePI90LV/LVT3486andPI90LV/LVT9637,aswellascompanion

line drivers PI90LV/LVB3487 and PI90LV/LVB9638 provide new

alternatives to RS-232, PECL, and ECL devices for high-speed,

point-to-point interface applications.

16-Pin

W, L

8-Pin

W,U