TC55NEM216ASTV55,70

2002-10-30

9/12

Note:

(1)

R/W remains HIGH for the read cycle.

(2)

If CE (or UB or LB ) goes LOW(or CS goes HIGH) coincident with or after R/W goes LOW, the outputs

will remain at high impedance.

(3)

If CE (or UB or LB ) goes HIGH(or CS goes LOW) coincident with or before R/W goes HIGH, the

outputs will remain at high impedance.

(4)

If OE is HIGH during the write cycle, the outputs will remain at high impedance.

(5)

Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be

applied.

SYMBOL

PARAMETER

MIN

TYP

MAX

UNIT

Data Retention Supply Voltage

2.0



5.5

V

Ta

= −40~40°C





3

Standby Current

Ta

= −40~85°C





20

µA

Chip Deselect to Data Retention Mode Time

0





ns

Recovery Time

5





ms

CONTROLLED DATA RETENTION MODE

CS CONTROLLED DATA RETENTION MODE

(See Note 2)

CE

4.5 V

GND

DATA RETENTION MODE

(See Note 1)

(See Note 1)

CE

4.5 V

GND

DATA RETENTION MODE

0.2 V

CS