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DS91C176 Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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DS91C176 Datasheet(HTML) 5 Page - National Semiconductor (TI) |
5 / 13 page Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 3, 8) Symbol Parameter Conditions Min Typ Max Units DRIVER AC SPECIFICATION t PLH Differential Propagation Delay Low to High R L =50 Ω,C L = 5 pF, 1.3 3.4 5.5 ns t PHL Differential Propagation Delay High to Low C D = 0.5 pF 1.3 3.1 5.5 ns t SKD1 (tsk(p)) Pulse Skew |t PLHD −tPHLD| (Notes 5, 9) Figure 6 and Figure 7 300 420 ps t SKD3 Part-to-Part Skew (Notes 6, 9) 2.2 ps t TLH (tr) Rise Time (Note 9) 1.0 1.8 3.0 ns t THL (tf) Fall Time (Note 9) 1.0 1.8 3.0 ns t PZH Enable Time (Z to Active High) R L =50 Ω,C L = 5 pF, 8 ns t PZL Enable Time (Z to Active Low ) C D = 0.5 pF 8 ns t PLZ Disable Time (Active Low to Z) Figure 8 and Figure 9 8ns t PHZ Disable Time (Active High to Z) 8 ns t JIT Random Jitter, RJ (Note 9) 100 MHz Clock Pattern (Note 7) 2.5 5.5 psrms f MAX Maximum Data Rate 200 Mbps RECEIVER AC SPECIFICATION t PLH Propagation Delay Low to High C L = 15 pF 2.0 4.7 8.5 ns t PHL Propagation Delay High to Low Figures 10, 11 and Figure 12 2.0 5.3 8.5 ns t SKD1 (tsk(p)) Pulse Skew |t PLHD −tPHLD| (Notes 5, 9) 0.6 1.7 ns t SKD3 Part-to-Part Skew (Notes 6, 9) 3.3 ns t TLH (tr) Rise Time (Note 9) 0.5 1.2 2.5 ns t THL (tf) Fall Time (Note 9) 0.5 1.2 2.5 ns t PZH Enable Time (Z to Active High) R L = 500 Ω,C L =15pF 10 ns t PZL Enable Time (Z to Active Low) Figure 13 and Figure 14 10 ns t PLZ Disable Time (Active Low to Z) 10 ns t PHZ Disable Time (Active High to Z) 10 ns f MAX Maximum Data Rate 200 Mbps Note 1: “Absolute Maximum Ratings” are those beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The tables of “Electrical Characteristics” provide conditions for actual device operation. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. Note 3: All typicals are given for VCC = 3.3V and TA = 25˚C. Note 4: The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this datasheet. Note 5: tSKD1,|tPLHD −tPHLD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. Note 6: tSKD3, Part-to-Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification applies to devices at the same VCC and within 5˚C of each other within the operating temperature range. Note 7: Stimulus and fixture Jitter has been subtracted. Note 8: CL includes fixture capacitance and CD includes probe capacitance. Note 9: Not production tested. Guaranteed by a statistical analysis on a sample basis at the time of characterization. www.national.com 5 |
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