IS61C632A

8

Integrated Circuit Solution Inc.

SSR001-0B

READ CYCLE SWITCHING CHARACTERISTICS

(Over Operating Range)

-4

-5

-6

-7

-8

Symbol Parameter

Min. Max.

Min. Max.

Min. Max.

Min. Max.

Min. Max. Unit

Cycle Time

8

—

10

—

12

—

13

—

15

—

ns

Clock High Time

4

—

4

—

4

—

6

—

6

—

ns

Clock Low Time

4

—

4

—

4

—

6

—

6

—

ns

Clock Access Time

—

4

—

5

—

6

—

7

—

8

ns

(2)

Clock High to Output Invalid

1.5

—

1.5

—

2

—

2

—

2

—

ns

(2,3)

Clock High to Output Low-Z

0

—

0

—

0

—

0

—

0

—

ns

(2,3)

Clock High to Output High-Z

1.5

4

1.5

5

2

6

2

6

2

6

ns

Output Enable to Output Valid

—

4

—

5

—

6

—

6

—

6

ns

(2)

Output Disable to Output Invalid

0

—

0

—

0

—

0

—

0

—

ns

(2,3)

Output Enable to Output Low-Z

0

—

0

—

0

—

0

—

0

—

ns

(2,3)

Output Disable to Output High-Z

—

4.5

—

4.8

—

6

—

6

—

6

ns

Address Setup Time

2.5

—

2.5

—

2.5

—

2.5

—

2.5

—

ns

Address Status Setup Time

2.5

—

2.5

—

2.5

—

2.5

—

2.5

—

ns

Write Setup Time

2.5

—

2.5

—

2.5

—

2.5

—

2.5

—

ns

Chip Enable Setup Time

2.5

—

2.5

—

2.5

—

2.5

—

2.5

—

ns

Address Advance Setup Time

2.5

—

2.5

—

2.5

—

2.5

—

2.5

—

ns

Address Hold Time

0.5

—

0.5

—

0.5

—

0.5

—

0.5

—

ns

Address Status Hold Time

0.5

—

0.5

—

0.5

—

0.5

—

0.5

—

ns

Write Hold Time

0.5

—

0.5

—

0.5

—

0.5

—

0.5

—

ns

Chip Enable Hold Time

0.5

—

0.5

—

0.5

—

0.5

—

0.5

—

ns

Address Advance Hold Time

0.5

—

0.5

—

0.5

—

0.5

—

0.5

—

ns

Configuration Setup

(1)

25

—

35

—

45

—

66.7

—

80

—

ns

Notes:

1.

Configuration signal MODE is static and must not change during normal operation.

2.

Guaranteed but not 100% tested. This parameter is periodically sampled.

3.

Tested with the load in Figure 2.