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MAX1209 Datasheet(PDF) 6 Page - Maxim Integrated Products

Part # MAX1209
Description  14-Bit, 95Msps, 3.3V ADC
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX1209 Datasheet(HTML) 6 Page - Maxim Integrated Products

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14-Bit, 95Msps, 3.3V ADC
6
_______________________________________________________________________________________
Note 1: Specifications
≥+25°C guaranteed by production test; <+25°C guaranteed by design and characterization.
Note 2: See definitions in the Parameter Definitions section at the end of this data sheet.
Note 3: Limit specifications include performance degradations due to a production test socket. Performance is improved when the
MAX12555 is soldered directly to the PC board.
Note 4: Due to test-equipment-jitter limitations at 175MHz, 0.15% of the spectrum on each side of the fundamental is excluded from
the spectral analysis.
Note 5: During power-down, D13–D0, DOR, and DAV are high impedance.
Note 6: Digital outputs settle to VIH or VIL.
Note 7: Guaranteed by design and characterization.
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3.3V, OVDD = 1.8V, GND = 0, REFIN = REFOUT (internal reference), VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, fCLK = 95MHz (50% duty cycle, 1.4VP-P square wave), TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Normal operating mode,
fIN = 175MHz at -0.5dBFS, CLKTYP = GND,
single-ended clock
465
Normal operating mode,
fIN = 175MHz at -0.5dBFS,
CLKTYP = OVDD, differential clock
497
545
Analog Power Dissipation
PDISS
Power-down mode clock idle, PD = OVDD
0.3
mW
Normal operating mode,
fIN = 175MHz at -0.5dBFS, OVDD = 1.8V,
CL
≈ 5pF
10.2
mA
Digital Output Supply Current
IOVDD
Power-down mode clock idle, PD = OVDD
8µA
TIMING CHARACTERISTICS (Figure 6)
Clock Pulse-Width High
tCH
5.2
ns
Clock Pulse-Width Low
tCL
5.2
ns
Data-Valid Delay
tDAV
CL = 5pF (Note 6)
5.2
ns
Data Setup Time Before Rising
Edge of DAV
tSETUP
CL = 5pF (Notes 6, 7)
5.5
ns
Data Hold Time After Rising Edge
of DAV
tHOLD
CL = 5pF (Notes 6, 7)
4.0
ns
Wake-Up Time from Power-Down
tWAKE
VREFIN = 2.048V
10
ms


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