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XRT72L50 Datasheet(PDF) 1 Page - Exar Corporation |
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XRT72L50 Datasheet(HTML) 1 Page - Exar Corporation |
1 / 471 page Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com áç áç áç áç XRT72L50 SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER OCTOBER 2003 REV. 1.2.1 GENERAL DESCRIPTION The XRT72L50, single Channel DS3/E3 Framer IC is designed to accept user data from the Terminal Equipment and insert this data into the payload bit- fields within an outbound DS3/E3 Data Stream. Fur- ther, the Framer IC is also designed to receive an in- bound DS3/E3 Data Stream from the Remote Termi- nal Equipment and extract out the user data. The XRT72L50 DS3/E3 Framer device is designed to support full-duplex data flow between Terminal Equip- ment and an LIU (Line Interface Unit) IC. The Framer Device will transmit, receive and process data in the DS3-C-bit Parity, DS3-M13, E3-ITU-T G.751 and E3- ITU-T G.832 Framing Formats. The XRT72L50 DS3/E3 Framer IC consists of a Transmit section, Receiver section, Performance Monitor Section and a Microprocessor interface. The Transmit Section includes a Transmit Payload Data Input Interface, a Transmit Overhead data Input Interface Section, a Transmit HDLC Controller, a Transmit DS3/E3 Framer block and a Transmit LIU In- terface Block which permits the Terminal Equipment to transmit data to a remote terminal. The Receive Section consists of a Receive LIU Inter- face, a Receive DS3/E3 Framer, a Receive HDLC Controller, a Receive Payload Data Output Interface, and a Receive Overhead Data Interface which allows the local terminal equipment to receive data from re- mote terminal equipment. The Microprocessor Interface is used to configure the Framer IC in different operating modes and monitor the performance of the Framer. The Performance Monitor Sections consist of a large number of Reset-upon-Read and Read-Only regis- ters that contain cumulative and one-second statistics that reflect the performance/health of the Framer IC/ system. FEATURES • Transmits, Receives and Processes data in the DS3-C-bit Parity, DS3-M13, E3-ITU-T G.751 and E3-ITU-T G.832 Framing Formats. • 1 Channel HDLC Controller - Tx and Rx • Interfaces to all Popular Microprocessors • Integrated Framer Performance Monitor • Available in a 100 Pin PQFP package • 3.3V Power Supply with 5V Tolerant I/O • Operating Temperature -40°C to +85°C APPLICATIONS • Network Interface Units • CSU/DSU Equipment. • PCM Test Equipment • Fiber Optic Terminals • DS3/E3 Frame Relay Equipment FIGURE 1. BLOCK DIAGRAM OF THE XRT72L50 T3/E3 Transm it Fram er T3 FEAC & Data Link C ontroller T3/E3 R eceive Fram er Perform ance Monitor Interrupt Controller TxO HInd TxN ibFram e TxFram e TxN ibC lk TxLnC lk TxFram eR ef TxN ib TxSer T3/E3 transm it Input RxC lk RxO Hind RxFram e RxN ib RxSer RxO utClk T3/E3 Receive O utput A[8:0] D[7:0] ALE_AS WR _R /W CS RD Y_DTCK Reset Int MO TO RD _D S µ P Interface TxLineClk TxPO S TxN EG RxLineClk RxPO S RxN EG ExtLO S LIU Interface/ Controller TestM ode NibIntf TxO HEnable TxO HC lk TxO HFram e TxAISEn TxO H TxO HIns T3/E3 Transm it O verhead Interface RxO HEnable RxO HC lk RxO H RxR ed RxO HFram e RxOOF T3/E3 Receive O verhead Interface HD LC controller HD LC controller TRST |
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