DS1085L

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REGISTER FUNCTIONS

The user-programmable registers can be used to determine the mode of operation (MUX), operating

frequency (DAC, OFFSET, DIV), and bus settings (ADDR). The functions of the registers are described

in this section, but the details of how these registers are programmed can be found in a later section. The

register settings are nonvolatile, with the values being stored automatically or as required in EEPROM

when the registers are programmed through the SDA and SCL pins.

MSB

LSB

MSB

LSB

d9

d8

d7

d6

d5

d4

d3

d2

d1

d0

XXXXXX

First Data Byte

Second Data Byte

X = Don’t care.

The DAC word (d0–d9) controls the frequency of the master oscillator. The resolution of this register

depends on the step size of the device. The absolute frequency of the device also depends on the value of

the OFFSET register (see Tables 5 and 6).

Table 5. DEVICE DEFAULT SETTINGS

DS1085LZ-5

DS1085LZ-12

DS1085LZ-25

Frequency

DAC

Offset

Frequency

DAC

Offset

Frequency

DAC

Offset

48.58MHz

500

OS

52.3MHz

600

OS

50.9MHz

500

OS

For any given value of OFFSET the master oscillator frequency can be derived as follows:

Frequency = Min Frequency + DAC x Step Size

where: Min frequency is the lowest frequency shown in Table 6 for the corresponding offset.

DAC is the value of the DAC register (0–1023).

Step size is the step size of the device (5kHz, 12.5kHz, or 25kHz).

OS is the decimal, integer value of the 5 MSBs of the RANGE register.

MSB

LSB

XXXO4

O3

O2

O1

O0

X = Don’t care.

The OFFSET byte (O0–O4) determines the range of frequencies that can be obtained within the absolute

minimum and maximum range of the oscillator. Correct operation of the device is not guaranteed for

values of OFFSET not shown in Table 6.