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GS9005BCTJ Datasheet(PDF) 4 Page - Gennum Corporation |
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GS9005BCTJ Datasheet(HTML) 4 Page - Gennum Corporation |
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4 / 12 page  4 of 12 32466 - 0 NOT RECOMMENDED FOR NEW DESIGNS SD0 SD0 SC0 SC0 SS1 SS0 CD DDI DDI VCC2 SDI SDI VCC1 VEE1 CAP A/D SS I VEE2 VCC4 GS9005B TOP VIEW LOOP RVCO0 RVCO1 RVCO2 OEM RVCO3 VCC3 FILT 25 24 23 22 21 20 19 5 6 7 8 9 10 11 12 13 14 15 16 17 18 4 3 2 28 27 26 AGC ƒ/2 EN VEE3 GS9005B PIN DESCRIPTIONS PIN NO. SYMBOL TYPE DESCRIPTION 1 A/D Input Analog/Digital Select. TTL compatible input used to select the input signal source. A logic HIGH routes the Equalizer inputs (pins 8 and 9) to the PLL and a logic LOW routes the Direct Digital inputs (pins 5 and 6) to the PLL. 2 AGC CAP Input AGC Capacitor. Connection for the AGC capacitor. 3VEE1 Power Supply. Most negative power supply connection. (Equalizer) 4VCC1 Power Supply. Most positive power supply connection. (Equalizer) 5,6 DDI/DDI Input Direct Data Inputs (true and inverse). Pseudo-ECL, differential serial data inputs. These are selected when the A/D input (pin 1) is at logic LOW and are self biased to 1.2 volts below VCC. They may be directly driven from true ECL drivers when VEE = -5V and VCC= 0 V. 7VCC2 Power Supply. Most positive power supply connection. ( Phase detector, A/D select, carrier detect). 8,9 SDI/SDI Input Serial Data Inputs (true and inverse). Differential analog serial data inputs. Inputs must be AC coupled and may be driven single ended. These inputs are selected when the A/D input (pin 1) is logic HIGH. 10 ƒ/2 EN Input ƒ/2 Enable-TTL compatible input used to enable the divide by 2 function. 11 VEE3 Power Supply. Most negative power supply connection. (VCO, Mux, Standard Select) 12 LOOP FILT Loop Filter. Node for connecting the loop filter components. 13 RVCO0 Input VCO Resistor 0. Analog current input used to set the centre frequency of the VCO when the two Standard Select bits (pins 20 and 21) are set to logic 0,0. A resistor is connected from this pin to VEE. 14 RVCO1 Input VCO Resistor 1. Analog current input used to set the centre frequency of the VCO when Standard Select bit 0 (pin 20) is set HIGH and bit 1 (pin 21) is set LOW. A resistor is connected from this pin to VEE. 15 RVCO2 Input VCO Resistor 2. Analog current input used to set the centre frequency of the VCO when Standard Select bit 0 (pin 20) is set LOW and bit 1 (pin 21) is set HIGH. A resistor is connected from this pin to VEE. 16 OEM Output Output Eye Monitor Analog voltage representing the serial bit stream after equalization but before reslicing. 17 R VCO3 Input VCO Resistor 3. Analog current input used to set the centre frequency of the VCO when the two Standard Select bits (pins 20 and 21) are set HIGH. A resistor is connected from this pin to V EE . Fig. 2 GS9005B Pin Connections tD SERIAL DATA OUT (SD0) 50% SERIAL CLOCK OUT (SCK) tD 50% Fig.1 Waveforms |
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