DM9101
10/100Mbps Ethernet Physical Layer Single Chip Transceiver
6
Final
Version: DM9101-DS-F03
July 22, 1999
Pin Description (continued)
Pin No.
Pin Name
I/O
Description
LQFP
QFP
MII Interface (continued)
74
76
CRS
O,Z
Carrier Sense:
This pin is asserted high to indicate the presence of carrier due to
receive or transmit activities in 10Base-T or 100Base-TX Half
Duplex modes.
In Repeater, when Full Duplex or Loop-back mode is a logic 1, it
indicates the presence of carrier due only to receive activity.
75
77
COL
O,Z
Collision Detect:
Asserted high to indicate detection of collision conditions in
10Mbps and 100Mbps Half Duplex modes. In 10Base-T Half
Duplex mode with Heartbeat set active (bit 13, register 18h), it is
also asserted for a duration of approximately 1ms at the end of
transmission to indicate heartbeat. In Full Duplex mode, this signal
is always logic 0. There is no heartbeat function in Full-Duplex
mode.
76
78
RX_DV
O,Z
Receive Data Valid:
Asserted high to indicate that valid data is present on RXD[3:0].
77
79
RX_ER/
RXD4
O,Z
Receive Error:
Asserted high to indicate that an invalid symbol has been detected
inside a received packet in 100Mbps mode.
In a bypass mode (BP4B5B or BPALIGN modes), RX_ER
becomes RXD4, the fifth RXD data bit of the 5B symbols.
78
80
RX_EN
I
Receive Enable:
Active high enabled for receive signals RXD[3:0], RX_CLK,
RX_DV and RX_ER. A low on this input tri-states these output
pins. For normal operation in a NODE application, this pin should
be pulled high.
Media Interface
7, 8
9, 10
RXI-, RXI+
I
100/10Mbps Differential Input Pair:
These pins are the differential receive input for 10Base-T and
100Base-TX. They are capable of receiving 100Base-TX MLT-3 or
10Base-T Manchester encoded data.
11, 12
13, 14
10 TXO-,
10 TXO+
O
10Base-T Differential Output Pair:
This output pair provides controlled rise and fall times designed to
filter the transmitters output.
23, 24
25, 26
100 TXO-,
100 TXO+
O
100Base-TX Differential Output Pair:
This output pair drives MLT-3 encoded data to the 100M twisted
pair interface and provides controlled rise and fall times designed
to filter the transmitter
output, reducing any associated EMI.