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AM29DL322D Datasheet(PDF) 4 Page - Advanced Micro Devices

Part # AM29DL322D
Description  32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29DL322D Datasheet(HTML) 4 Page - Advanced Micro Devices

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June 10, 2003
Am29DL322D/323D/324D
3
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Special Handling Instructions for FBGA Package ..........................6
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 8
Word/Byte Configuration ................................................................ 8
Requirements for Reading Array Data ...........................................8
Writing Commands/Command Sequences ....................................9
Simultaneous Read/Write Operations
with Zero Latency ...........................................................................9
Standby Mode ................................................................................ 9
Automatic Sleep Mode ...................................................................9
RESET#: Hardware Reset Pin .....................................................10
Output Disable Mode ...................................................................10
Autoselect Mode .......................................................................... 15
Sector/Sector Block Protection and Unprotection ........................ 16
Write Protect (WP#) .....................................................................17
Temporary Sector Unprotect ........................................................17
Figure 1. Temporary Sector Unprotect Operation................................. 17
Figure 2. In-System Sector Protection/
Sector Unprotection Algorithms ............................................................ 18
SecSi (Secured Silicon) Sector
Flash Memory Region ..................................................................19
Hardware Data Protection ............................................................20
Common Flash Memory Interface (CFI) . . . . . . . 20
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 22
Reading Array Data ......................................................................22
Reset Command ..........................................................................23
Autoselect Command Sequence ..................................................23
Enter SecSi Sector/Exit SecSi Sector
Command Sequence ...................................................................23
Byte/Word Program Command Sequence ...................................23
Figure 3. Program Operation ................................................................ 24
Chip Erase Command Sequence .................................................24
Sector Erase Command Sequence ..............................................25
Erase Suspend/Erase Resume Commands ................................25
Figure 4. Erase Operation..................................................................... 26
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 28
DQ7: Data# Polling ......................................................................28
Figure 5. Data# Polling Algorithm ......................................................... 28
RY/BY#: Ready/Busy# ................................................................. 29
DQ6: Toggle Bit I .......................................................................... 29
Figure 6. Toggle Bit Algorithm .............................................................. 29
DQ2: Toggle Bit II ......................................................................... 30
Reading Toggle Bits DQ6/DQ2 .................................................... 30
DQ5: Exceeded Timing Limits ...................................................... 30
DQ3: Sector Erase Timer ............................................................. 30
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 32
Figure 7. Maximum Negative Overshoot Waveform............................. 32
Figure 8. Maximum Positive Overshoot Waveform .............................. 32
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 9. ICC1 Current vs. Time (Showing Active and
Automatic Sleep Currents).................................................................... 34
Figure 10. Typical ICC1 vs. Frequency................................................... 34
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 11. Test Setup .......................................................................... 35
Figure 12. Input Waveforms and Measurement Levels ........................ 35
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 13. Read Operation Timings...................................................... 36
Figure 14. Reset Timings...................................................................... 37
Word/Byte Configuration (BYTE#) ............................................... 38
Figure 15. BYTE# Timings for Read Operations .................................. 38
Figure 16. BYTE# Timings for Write Operations .................................. 38
Erase and Program Operations ................................................... 39
Figure 17. Program Operation Timings ................................................ 40
Figure 18. Accelerated Program Timing Diagram ................................ 40
Figure 19. Chip/Sector Erase Operation Timings ................................. 41
Figure 20. Back-to-back Read/Write Cycle Timings ............................. 42
Figure 21. Data# Polling Timings (During Embedded Algorithms) ....... 42
Figure 22. Toggle Bit Timings (During Embedded Algorithms) ............ 43
Figure 23. DQ2 vs. DQ6 ....................................................................... 43
Temporary Sector Unprotect ........................................................ 44
Figure 24. Temporary Sector Unprotect Timing Diagram..................... 44
Figure 25. Sector/Sector Block Protect and Unprotect Timing Diagram 45
Alternate CE# Controlled Erase and Program Operations ........... 46
Figure 26. Alternate CE# Controlled Write (Erase/Program)
Operation Timings ................................................................................ 47
Erase And Programming Performance . . . . . . . 48
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 48
TSOP And SO Pin Capacitance . . . . . . . . . . . . . . 48
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 49
FBD063—63-ball Fine-Pitch Ball Grid Array (FBGA) 8 x 14 mm . 49
TS 048—48-Pin Standard TSOP ................................................. 50
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 51


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