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LH1562F1 Datasheet(PDF) 6 Page - Sharp Corporation

Part # LH1562F1
Description  240-output LCD Segment/Common Driver IC
Download  28 Pages
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Manufacturer  SHARP [Sharp Corporation]
Direct Link  http://sharp-world.com/
Logo SHARP - Sharp Corporation

LH1562F1 Datasheet(HTML) 6 Page - Sharp Corporation

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LH1562
6
FUNCTIONAL DESCRIPTION
Pin Functions
(Segment mode)
SYMBOL
FUNCTION
VDD
Logic system power supply pin, connected to +2.5 to +5.5 V.
V0L, V0R
V12L, V12R
V43L, V43R
V5L, V5R
Bias power supply pins for LCD drive voltage
• Normally use the bias voltages set by a resistor divider.
• Ensure that voltages are set such that VSS ≤ V5 < V43 < V12 < V0.
•ViL and ViR (i = 0, 12, 43, 5) must connect to an external power supply, and supply regular
voltage which is assigned by specification for each power pin.
DI7-DI0
Input pins for display data
• In 4-bit parallel input mode, input data into the 4 pins, DI3-DI0.
Connect DI7-DI4 to VSS or VDD.
• In 8-bit parallel input mode, input data into the 8 pins, DI7-DI0.
• Refer to "RELATIONSHIP BETWEEN THE DISPLAY DATA AND LCD DRIVE OUTPUT
PINS" in Functional Operations.
VSS
Ground pin, connected to 0 V.
Control input pin for output of non-select level
• The input signal is level-shifted from logic voltage level to LCD drive voltage level, and
controls the LCD drive circuit.
• When set to VSS level "L", the LCD drive output pins (Y1-Y240) are set to level V5.
• When set to "L", the contents of the line latch are reset, but the display data are read in the
data latch regardless of the condition of
. When the
function is canceled,
the driver outputs non-select level (V12 or V43), then outputs the contents of the data latch at
the next falling edge of the LP. At that time, if
removal time does not correspond
to what is shown in AC characteristics, it can not output the reading data correctly.
• Table of truth values is shown in "TRUTH TABLE" in Functional Operations.
Clock input pin for taking display data
• Data is read at the falling edge of the clock pulse.
XCK
L/R
Input pin for selecting the reading direction of display data
• When set to VSS level "L", data is read sequentially from Y240 to Y1.
• When set to VDD level "H", data is read sequentially from Y1 to Y240.
• Refer to "RELATIONSHIP BETWEEN THE DISPLAY DATA AND LCD DRIVE OUTPUT
PINS" in Functional Operations.
LP
Latch pulse input pin for display data
• Data is latched at the falling edge of the clock pulse.


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