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HT48CA5 Datasheet(PDF) 7 Page - Holtek Semiconductor Inc |
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HT48CA5 Datasheet(HTML) 7 Page - Holtek Semiconductor Inc |
7 / 39 page HT48RA5/HT48CA5 Rev. 1.20 7 June 10, 2005 Program Memory - ROM The program memory is used to store the program in- structions which are to be executed. It also contains data, table, and interrupt entries, and is organized into 8192 ´16 bits´5 banks, addressed by the program coun- ter and table pointer. Certain locations in the program memory are reserved for special usage: · Location 000H This area is reserved for program initialization. After chip reset, the program always begins execution at lo- cation 000H. · Location 004H This area is reserved for the external interrupt service program. If the INT input pin is activated, the interrupt is enabled and the stack is not full, the program begins execution at location 004H. · Location 008H This area is reserved for the Timer/Event Counter 0 in- terrupt service program. If a timer interrupt results from a Timer/Event Counter 0 overflow, and if the in- terrupt is enabled and the stack is not full, the program begins execution at location 008H . · Location 00CH This location is reserved for the Timer/Event Counter 1 interrupt service program. If a timer interrupt results from a Timer/Event Counter 1 overflow, and the inter- rupt is enabled and the stack is not full, the program begins execution at location 00CH. · Table location Any location in the program memory can be used as look-up tables. The instructions ²TABRDC [m]² (page specified by TBHP) and ²TABRDL [m]² (the last page) transfer the contents of the lower-order byte to the specified data memory, and the higher-order byte to TBLH (08H). The higher-order byte table pointer TBHP (1FH) and lower-order byte table pointer TBLP (07H) are read/write registers, which indicate the table locations. Before accessing the table, the location has to be placed in TBHP and TBLP. The TBLH is read only and cannot be restored. If the main routine and the ISR (interrupt service routine) both employ the ta- ble read instruction, the contents of TBLH in the main routine are likely to be changed by the table read in- struction used in the ISR. Errors are thus brought about. Given this, using the table read instruction in the main routine and the ISR simultaneously should be avoided. However, if the table read instruction has to be applied in both main routine and the ISR, the in- terrupt(s) is supposed to be disabled prior to the table read instruction. It (They) will not be enabled until the TBLH in the main routine has been backup. All table related instructions require 2 cycles to complete the operation. Stack Register - STACK This is a special part of the memory which is used to save the contents of the program counter (PC) only. The stack is organized into 8 levels and is neither part of the data nor part of the program space, and is neither read- able nor writeable. The activated level is indexed by the stack pointer (SP) and is neither readable nor writeable. At a subroutine call or interrupt acknowledge signal, the contents of the program counter are pushed onto the stack. At the end of a subroutine or an interrupt routine, signaled by a return instruction (RET or RETI), the pro- gram counter is restored to its previous value from the stack. After a chip reset, the SP will point to the top of the stack. If the stack is full and a non-masked interrupt takes place, the interrupt request flag will be recorded but the acknowledge signal will be inhibited. When the stack pointer is decremented (by RET or RETI), the interrupt will be serviced. This feature prevents stack overflow al- lowing the programmer to use the structure more easily. In a similar case, if the stack is full and a ²CALL² is sub- 1 6 b i t s 9 F F F H n F F H P r o g r a m M e m o r y D e v i c e I n i t i a l i z a t i o n P r o g r a m E x t e r n a l I n t e r r u p t S u b r o u t i n e T i m e r / E v e n t C o u n t e r 0 I n t e r r u p t S u b r o u t i n e L o o k - u p T a b l e ( 2 5 6 w o r d s ) L o o k - u p T a b l e ( 2 5 6 w o r d s ) N o t e : n r a n g e s f r o m 0 t o 9 F 0 0 C H n 0 0 H 0 0 8 H 0 0 4 H 0 0 0 H T i m e r / E v e n t C o u n t e r 1 I n t e r r u p t S u b r o u t i n e Program Memory Instruction Table Location *15~*8 *7 *6 *5 *4 *3 *2 *1 *0 TABRDC [m] TBHP @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 10011111 @7 @6 @5 @4 @3 @2 @1 @0 Table Location Note: *15~*0: Table location bits @7~@0: Table pointer bits |
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