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MX26LV800ABTC-55 Datasheet(PDF) 1 Page - Macronix International |
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MX26LV800ABTC-55 Datasheet(HTML) 1 Page - Macronix International |
1 / 50 page 1 P/N:PM1128 REV. 1.1, MAR. 28, 2005 MX26LV800AT/AB 8M-BIT[1Mx8/512Kx16]CMOSSINGLEVOLTAGE 3V ONLY HIGH SPEED eLiteFlashTM MEMORY and erase operation completion • Ready/Busy# pin (RY/BY#) - Provides a hardware method of detecting program or erase operation completion • CFI (Common Flash Interface) compliant - Flash device parameters stored on the device and provide the host system to access • 2,000 minimum erase/program cycles • Latch-up protected to 100mA from -1V to VCC+1V • Boot Sector Architecture - T = Top Boot Sector - B = Bottom Boot Sector • Package type: - 48-pin TSOP - 48-ball CSP • Compatibility with JEDEC standard - Pinout and software compatible with single-power supply Flash • 20 years data retention FEATURES • Extended single - supply voltage range 3.0V to 3.6V • 1,048,576 x 8/524,288 x 16 switchable • Single power supply operation - 3.0V only operation for read, erase and program operation • Fast access time: 55/70ns • Low power consumption - 30mA maximum active current - 30uA typical standby current • Command register architecture - Byte/word Programming (55us/70us typical) - Sector Erase (Sector structure 16K-Bytex1, 8K-Bytex2, 32K-Bytex1, and 64K-Byte x15) • Auto Erase (chip & sector) and Auto Program - Automatically erase any combination of sectors with Erase verify capability. - Automatically program and verify data at specified address • Status Reply - Data# polling & Toggle bit for detection of program GENERAL DESCRIPTION The MX26LV800AT/AB is a 8-mega bit high speed Flash memory organized as 1M bytes of 8 bits or 512K words of 16 bits. MXIC's high speed Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX26LV800AT/AB is pack- aged in 48-pin TSOP, and 48-ball CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX26LV800AT/AB offers access time as fast as 55ns, allowing operation of high-speed micropro- cessors without wait states. To eliminate bus conten- tion, the MX26LV800AT/AB has separate chip enable (CE#) and output enable (OE#) controls. MXIC's high speed Flash memories augment EPROM functionality with in-circuit electrical erasure and program- ming. The MX26LV800AT/AB uses a command register to manage this functionality. The command register al- lows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while main- taining maximum EPROM compatibility. MXIC high speed Flash technology reliably stores memory contents even after 2,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combi- nation of advanced tunnel oxide processing and low in- ternal electric fields for erase and program operations produces reliable cycling. The MX26LV800AT/AB uses a 3.0V~3.6V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up pro- tection is proved for stresses up to 100 milliamperes on address and data pin from -1V to VCC + 1V. Macronix NBitTM Memory Family |
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Similar Description - MX26LV800ABTC-55 |
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