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552GE622M080BG Datasheet(PDF) 3 Page - Silicon Laboratories |
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552GE622M080BG Datasheet(HTML) 3 Page - Silicon Laboratories |
3 / 8 page Si552 Preliminary Rev. 0.2 3 RMS Jitter for FOUT of 125 to 500 MHz 12 kHz to 20 MHz 50 kHz to 80 MHz — — 0.61 0.52 — — ps 125 < FOUT < 500 MHz Differential Modes: LVPECL/LVDS/CML Period Jitter for FOUT < 160 MHz Peak-to-Peak RMS — — 7 2 — — ps Any output N = 1000 cycles LVPECL Output Option mid-level swing (diff) swing (single-ended) VDD – 1.42 1.1 0.5 — — — VDD – 1.25 1.9 0.93 V VPP VPP 50 Ω to VDD – 2.0 V LVDS Output Option mid-level swing (diff) 1.125 0.5 1.2 0.7 1.275 0.9 V VPP Rterm =100 Ω (differential) CML Output Option mid-level swing — 0.35 VDD – 0.36 0.425 — 0.5 V VPP Rterm = 100 Ω (differential) CMOS Output Option VOH VOL 0.8xVDD — — — VDD 0.4 V CL =15pF Rise/Fall time — 1 350 — ps ns CML/LVPECL/LVDS at 20% / 80% CMOS Inputs Voltage 3.3 V option 2.5 V option 1.8 V option 2.97 2.25 1.71 3.3 2.5 1.8 3.63 2.75 1.89 V Optional parameter specified by P/N Supply Current — 90 — mA Control Voltage (VC)0 — VDD V Tuning range for control voltage Frequency Select VIL VIH 0 0.75 x VDD — — 0.5 VDD V “0” selects F1 “1” selects F2 Table 2. Absolute Maximum Ratings Parameter Symbol Rating Units Supply Voltage VDD –0.5 to +3.8 V Storage Temperature TS –55 to +125 °C Table 1. Si552 Electrical Specifications (Continued) Parameter Min Typ Max Units Notes |
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