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ADC14L040EVAL Datasheet(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # ADC14L040EVAL
Description  14-Bit, 40 MSPS, 235 mW A/D Converter
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

ADC14L040EVAL Datasheet(HTML) 1 Page - National Semiconductor (TI)

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ADC14L040
14-Bit, 40 MSPS, 235 mW A/D Converter
General Description
The ADC14L040 is a low power monolithic CMOS analog-
to-digital converter capable of converting analog input sig-
nals into 14-bit digital words at 40 Megasamples per second
(MSPS). This converter uses a differential, pipeline architec-
ture with digital error correction and an on-chip sample-and-
hold circuit to minimize power consumption while providing
excellent dynamic performance and a 150 MHz Full Power
Bandwidth. Operating on a single +3.3V power supply, the
ADC14L040 achieves 11.9 effective bits at nyquist and con-
sumes just 235 mW at 40 MSPS . The Power Down feature
reduces power consumption to 15 mW.
The differential inputs provide a full scale differential input
swing equal to 2 times V
REF with the possibility of a single-
ended input. Full use of the differential input is recom-
mended for optimum performance. Duty cycle stabilization
and output data format are selectable using a quad state
function pin. The output data can be set for offset binary or
two’s complement.
To ease interfacing to lower voltage systems, the digital
output driver power pins of the ADC14L040 can be con-
nected to a separate supply voltage in the range of 2.4V to
the analog supply voltage.
This device is available in the 32-lead LQFP package and
will operate over the industrial temperature range of −40˚C to
+85˚C. An evaluation board is available to ease the evalua-
tion process.
Features
n
Single +3.3V supply operation
n
Internal sample-and-hold
n
Internal reference
n
Outputs 2.4V to 3.6V compatible
n
Duty Cycle Stabilizer
n
Power down mode
Key Specifications
n
Resolution
14 Bits
n
DNL
±0.5 LSB (typ)
n
SNR (f
IN = 10 MHz)
74 dB (typ)
n
SFDR (f
IN = 10 MHz)
90 dB (typ)
n
Data Latency
7 Clock Cycles
n
Power Consumption
n
-- Operating
235 mW (typ)
n
-- Power Down Mode
15 mW (typ)
Applications
n
Medical Imaging
n
Instrumentation
n
Communications
n
Digital Video
Connection Diagram
20146501
March 2006
© 2006 National Semiconductor Corporation
DS201465
www.national.com


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