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MC68HC705E6 Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MC68HC705E6 Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
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10 / 140 page  General Description MC68HC05E6 — Rev. 1.0 General Description References specific to the MC68HC705E6 are italicised in the text. NOTE: Information given for the MC68HC705E6 cannot be guaranteed. All values are design targets only and may change before the device is qualified. Features • Fully static design featuring the industry-standard M68HC05 core • On-chip oscillator with crystal or ceramic resonator clock options • 6000 bytes of user ROM plus 16 bytes of user vectors (MC68HC05E6); 6144 bytes of user EPROM plus 16 bytes of user vectors (MC68HC705E6) • 240 bytes of bootloader ROM (MC68HC705E6) • 160 bytes of EEPROM • 128 bytes of RAM • Single supply voltage (no external voltage required for EEPROM programming) • 4-channel, 8-bit A/D converter • 16-bit programmable timer with input capture and output compare • 15-stage multipurpose core timer with overflow, watchdog and real-time interrupt • 32 programmable bidirectional I/O lines and four input-only lines including eight fixed wire pull-ups (port A), eight fixed wire pull-downs (port B) and 16 software selectable pull-ups (ports C and D) • Keyboard interrupt facility available on all pins of port C • Low voltage indicator (LVI) • Power saving STOP and WAIT modes • Available in 44-pin QFP and 28-pin SOIC packages; four of the ports are not fully bonded out in the 28-pin package (see Figure 1) 2-gen Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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