NCN4555

http://onsemi.com

9

The typical waveform provided in Figure 10 shows how

the accelerator operates. During the first 200 ns (typical),

the slope of the rise time is solely a function of the pullup

resistor associated with the stray capacitance. During this

period, the PMOS devices are not activated since the input

providing a low impedance to charge the capacitance, thus

increasing the rise time as depicted in Figure 10. The same

mechanism applies for the opposite side of the line to make

sure the system is optimum.

INPUT SCHMITT TRIGGERS

All the Logic input pins (excepted I/O and SIM_I/O, See

Figure 3) have built−in Schmitt trigger circuits to prevent

the NCN4555 against uncontrolled operation. The typical

dynamic characteristics of the related pins are depicted

Figure 11.

The output signal is guaranteed to go High when the input

considered (see the Digital Input Table on page 5).

SHUTDOWN OPERATING

In order to save power or for other purpose required by the

application it is possible to put the NCN4555 in a shutdown

mode by setting Low the pin STOP. On the other hand the

becomes lower than 1.1 V typically.

ESD PROTECTION

The NCN4555 SIM interface features an HBM ESD

voltage protection in excess of 7 kV for all the SIM pins

the other pins (microcontroller side) sustain at least 2 kV.

These values are guaranteed for the device in its full integrity

without considering the external capacitors added to the

circuit for a proper operating. Consequently in the operating

conditions it is able to sustain much more than 7 kV on its

SIM pins making it perfectly protected against electrostatic

discharge well over the HBM ESD voltages required by the

ISO7816 standard (4 kV).

PRINTED CIRCUIT BOARD LAYOUT

Careful layout routing will be applied to achieve a good

and efficient operating of the device in its mobile or portable

environment and fully exploit its performance.

The bypass capacitors have to be connected as close as

order to reduce as much as possible parasitic behaviors

(ripple

and

noise).

It

is

recommended

to

use

ceramic capacitors.

The exposed pad of the QFN−16 package will be

connected to the ground as well as the unconnected pins

(NC). A relatively large ground plane is recommended.

Figures 12 and 13 shows an example of PCB device

implementation in an evaluation environment.

Figure 10. SIM_IO Typical Rise and Fall Times with

Stray Capacitance > 30 pF

(33 pF Capacitor Connected on the Board)

OUTPUT

ON

OFF

or 0.4 V

INPUT

Figure 11. Typical Schmitt Trigger Characteristics