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MB88155PFTG-100-JN-ERE1 Datasheet(PDF) 3 Page - Fujitsu Component Limited. |
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MB88155PFTG-100-JN-ERE1 Datasheet(HTML) 3 Page - Fujitsu Component Limited. |
3 / 24 page MB88155 3 ■ PIN ASSIGNMENT ■ PIN DESCRIPTION Pin name I/O Pin no. Description XIN I 1 Connection pin of resonator/clock input pin XOUT O 2 Connection pin of resonator ENS/XPD I 3 Modulation enable pin/power down pin SEL I 4 Modulation rate setting pin Down spread, SEL = “L” : Modulation rate − 1.0% Down spread, SEL = “H” : Modulation rate − 2.0% Down spread, SEL = “L” : Modulation rate ± 0.5% Down spread, SEL = “H” : Modulation rate ± 1.0% REFOUT O 5 Non-modulated clock output pin This pin becomes to“L” at power-down. VSS ⎯ 6GND Pin CKOUT O 7 Modulated clock output pin This pin becomes to“L” at power-down. VDD ⎯ 8 Power supply voltage pin 1 2 3 4 8 7 6 5 XIN XOUT ENS SEL VDD CKOUT VSS REFOUT 1 2 3 4 8 7 6 5 XIN XOUT XPD SEL VDD CKOUT VSS REFOUT MB88155 -xx0 -xx1 MB88155 -xx2 -xx3 FPT-8P-M07 |
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