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IDT728981J Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT728981J Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 10 page 2 Commercial Temperature Range IDT728981 Time Slot Interchange Digital Switch 128 x 128 35 34 33 32 31 30 29 37 36 5703 drw02 INDEX 38 39 11 12 13 14 15 16 17 9 10 8 7 TX3 GND D0 RX3 VCC F0i C4i A0 D1 D2 D3 D4 A1 A2 DNC(1) DNC(1) DNC(1) DNC(1) VCC VCC VCC VCC DTA DNC(1) ODE 1 2 40 39 TX0 3 38 TX1 4 37 TX2 5 36 TX3 6 35 7 34 8 33 9 32 10 31 GND 11 30 D0 12 29 CS 13 28 14 27 5703 drw04 15 16 17 18 19 20 26 25 24 23 22 21 RX1 RX2 RX3 F0i A0 R/ W DS C4i VCC RX0 D1 D2 D3 D4 D5 D6 D7 A1 A2 A3 A4 A5 DNC(1) DNC(1) DNC(1) DNC(1) VCC VCC VCC VCC PIN CON.IGURATION PIN DESCRIPTIONS PLCC: 0.05in. pitch, 0.65in. x 0.65in. (J44-1, order code: J) TOP VIEW PLASTIC DIP: 0.10in. pitch, 2.05in. x 0.60in. (P40-1, order code: P) TOP VIEW NOTE: 1. DNC - Do Not Connect SYMBOL NAME I/O DESCRIPTION GND Ground. Ground Rail. VCC VCC +5.0 Volt Power Supply. DTA Data Acknowledgment O This active LOW output indicates that a data bus transfer is complete. A pull-up resistor is required at this (Open Drain) output. RX0-3 RX Input 0 to 3 I Serial data input streams. These streams have 32 channels at data rates of 2.048 Mb/s. F0i Frame Pulse I This input identifies frame synchronization signals formatted to ST-BUS® specifications. C4i Clock I 4.096 MHz serial clock for shifting data in and out of the data streams. A0-A5 Address 0 to 5 I These lines provide the address to IDT728981 internal registers. DS Data Strobe I This is the input for the active HIGH data strobe on the microprocessor interface. This input operates with CS to enable the internal read and write generation. R/ W Read/Write I This input controls the direction of the data bus lines (D0-D7) during a microprocessor access. CS Chip Select I Active LOW input enabling a microprocessor read or write of control register or internal memories. D0-D7 Data Bus 0 to 7 I/O These pins provide microprocessor access to data in the internal control register. Connection Memory HIGH, Connection Memory LOW and data memory. TX0-3 TX Outputs 0 to 3 O Serial data output streams. These streams are composed of 32, 64 Kbit/s channels at data rates of 2.048 Mb/s. (Three-state Outputs) ODE Output Drive Enable I This is an output enable for the TX0-3 serial outputs. If this input is LOW, TX0-3 are high-impedance. If this is HIGH, each channel may still be put into high-impedance by software control. 29 28 27 26 25 24 23 31 30 5703 drw03 INDEX 32 33 5 6 7 8 9 10 11 3 4 2 1 TX3 GND D0 RX3 VCC F0i C4i A0 D1 D2 D3 D4 A1 A2 VCC VCC VCC VCC DNC(1) DNC(1) DNC(1) DNC(1) PQFP: 0.80mm pitch, 10mm x 10mm (DB44-1, order code: DB) TOP VIEW |
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