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PTH12010WAS Datasheet(PDF) 4 Page - Texas Instruments |
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PTH12010WAS Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 27 page  www.ti.com ELECTRICAL CHARACTERISTICS PTH12010W, PTH12010L SLTS205E–JUNE 2003–REVISED APRIL 2006 ELECTRICAL CHARACTERISTICS (continued) TA =25°C, Vi =12V,VO = 3.3 V, Ci = 560 µF, CO =0 µF, and IO =IO max (Unless otherwise stated) PTH12010W CHARACTERISTICS CONDITIONS MIN TYP MAX UNIT nonceramic 0(8) 330(9) 6,600(10) Capacitance value µF CO External output capacitance ceramic 0 300 Equivalent series resistance (nonceramic) 4(11) mΩ Per Bellcore TR-332 MTBF Reliability 6.4 106 Hr 50% stress, Ta =40 °C, ground benign (8) When operating at an output voltage ≥ 3.3 V, 47-µF of external output capacitance is required for proper operation. (9) An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load improves the transient response. (10) This is the calculated maximum. The minimum ESR limitation often results in a lower value. When controlling the Track pin using a voltage supervisor, CO(max) is reduced to 3300 µF. See the application notes for further guidance. (11) This is the typical ESR for all the electrolytic (nonceramic) ouput capacitance. Use 7 mΩ as the minimum when using max-ESR values to calculate. TA =25°C, Vi =12V,VO = 1.8 V, Ci = 560 µF, CO =0 µF, and IO =IOmax (Unless otherwise stated) PTH12010L CHARACTERISTICS CONDITIONS MIN TYP MAX UNIT 60 °C, 200 LFM airflow 0 - 12(12) Io Output current 0.8 V ≤ VO≤ 1.8 V A 25 °C, natural convection 0 12(1) VI Input voltage range Over IO range 10.8 13.2 V Vo tol Set-point voltage tolerance ±2(13) %Vo ∆Regtemp Temperature variation –40 °C <TA <85 °C ±0.5 %Vo ∆Regline Line regulation Over Vi range ±10 mV ∆Regload Load regulation Over IO range ±12 mV ∆Regtot Total output variation Includes set-point, line, load, ±3(2) %Vo –40°C ≤ TA≤ 85 °C Vadj Output voltage adjust range Over Vi range 0.8 1.8 V RSET = 130 Ω,Vo =1.8 V 89 RSET =3.57kΩ,Vo =1.5 88 V η Efficiency IO=8A RSET = 12.1 kΩ,Vo =1.2 86 % V RSET = 32.4 kΩ,Vo =1V 84 RSET = OPEN, Vo =0.8 V 82 Vo≤ 1 V 25 mVpp Vr VO ripple (peak-to-peak) 20 MHz bandwidth Vo≤ 1V 1 %VO Io trip Overcurrent threshold Reset, followed by auto-recovery 20 A 1 A/µs load step, 50 to 100 % Iomax, CO = 330 µF Transient response ttr Recovery Time 70 µSec ∆Vtr VO over/undershoot 100 mV VO adj Margin up/down adjust ±5% IIL margin Margin input current (pins 9 /10) Pin to GND –8(14) µA (12) See SOA curves or consult factory for appropriate derating. (13) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1%, with 100 ppm/°C (or better) temperature stability. (14) A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc. 4 Submit Documentation Feedback |
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