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MB15E07SRPV1 Datasheet(PDF) 9 Page - Fujitsu Component Limited. |
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MB15E07SRPV1 Datasheet(HTML) 9 Page - Fujitsu Component Limited. |
9 / 25 page MB15E07SR 9 Table 2. Binary 14-bit Programmable Reference Counter Data Setting Note : Divide ratio less than 3 is prohibited. Table 3. Binary 11-bit Programmable Counter Data Setting Note : Divide ratio less than 3 is prohibited. Divide ratio (R) R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 3 0 0 0 0 0 000000011 4 0 0 0 0 0 000000100 ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅⋅⋅⋅⋅⋅⋅⋅⋅ 16383 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Divide ratio (N) N11 N10 N9N8N7N6N5N4N3N2N1 3 0 0000000011 4 0 0000000100 ⋅ ⋅ ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ 2047 1 1111111111 123456789 10 11 12 13 14 15 16 17 18 19 C N T A 1 A 2 A 3 A 4 A 5 A 6 A 7 N 1 N 2 N 3 N 4 N 5 N 6 N 7 N 8 N 9 N 10 N 11 Programmable Counter LSB MSB Data Flow CNT : Control bit [Table 1] N1 to N11: Divide ratio setting bits for the programmable counter (3 to 2,047) [Table 3] A1 to A7 : Divide ratio setting bits for the swallow counter (0 to 127) [Table 4] Note: Data input with MSB first. |
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