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W78ERD2 Datasheet(PDF) 7 Page - Winbond |
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W78ERD2 Datasheet(HTML) 7 Page - Winbond |
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7 / 72 page  W78ERD2 Publication Release Date: April 20, 2005 - 7 - Revision A4 6. FUNCTIONAL DESCRIPTION The W78ERD2 architecture consists of a core controller surrounded by various registers, four general purpose I/O ports, one special purpose programmable 4-bits I/O port, 256 bytes of RAM, 1K AUX- RAM, three timer/counters, a serial port and an internal 74373 latch and 74244 buffer which can be switched to port2. The processor supports 111 different opcodes and references both a 64K program address space and a 64K data storage space. 6.1 RAM The internal data RAM in the W78ERD2 is 256 + 1K bytes. It is divided into two banks: 256 bytes of scratchpad RAM and 1K bytes of AUX-RAM. These RAMs are addressed by different ways. • RAM 0H − 7FH can be addressed directly and indirectly as the same as in 8051. Address pointers are R0 and R1 of the selected register bank. • RAM 80H − FFH can only be addressed indirectly as the same as in 8051. Address pointers are R0, R1 of the selected registers bank. • AUX-RAM 0H −3FFH is addressed indirectly as the same way to access external data memory with the MOVX instruction. Address pointer are R0 and R1 of the selected register bank and DPTR register. An access to external data memory locations higher than 3FFH will be performed with the MOVX instruction in the same way as in the 8051. The AUX-RAM will be enabled after a reset. Clearing the bit 1 in AUXR register will enable the access to AUX-RAM. When AUX-RAM is enabled the instructions of "MOVX @Ri" will always access to on-chip AUX-RAM. When executing from internal program memory, an access to AUX-RAM will not affect the Ports P0, P2, WR and RD . Example, ANL AUXR, #11111101B ; Enable AUX-RAM MOV DPTR, #1234H MOV A, #56H MOVX @DPTR, A ; Write 56h data to external memory at address 1234H MOV XRAMAH, #02H ; Only 2 LSB effective MOV R0, #34H MOV A, @R0 ; Read AUX-RAM data at address 0234H 6.2 Timers 0, 1 and 2 Timers 0, 1, and 2 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0, TL1 and TH1 for Timer 1, and TL2 and TH2 for Timer 2. The TCON and TMOD registers provide control functions for timers 0, 1. The T2CON register provides control functions for Timer 2. RCAP2H and RCAP2L are used as reload/capture registers for Timer 2. The operations of Timer 0 and Timer 1 are the same as in the W78C51. Timer 2 is a 16-bit timer/counter that is configured and controlled by the T2CON register. Like Timers 0 and 1, Timer 2 can operate as either an external event counter or as an internal timer, depending on the setting of bit C/T2 in T2CON. Timer 2 has three operating modes: capture, auto-reload, and baud rate generator. The clock speed at capture or auto-reload mode is the same as that of Timers 0 and 1. |
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