+3.3V/+5V, 8-Channel Relay Drivers with Fast

Recovery Time and Power-Save Mode

8

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PIN

MAX4822

MAX4823

NAME

FUNCTION

19

19

20

20

SET

Set Input. Drive SET low to set all latches and registers high (all outputs are low

impedance). SET overrides all parallel and serial control inputs. RESET overrides SET

under all conditions.

EP

EP

EP

Exposed Pad. Connect exposed paddle to GND.

PIN

MAX4824

MAX4825

NAME

FUNCTION

11

RESET

Reset Input. Drive RESET low to clear all latches and registers (all outputs are high

impedance). RESET overrides all other inputs. If RESET and SET are pulled low at the

same time, then RESET takes precedence.

22

CS

Chip-Select Input. Drive CS low to select the device. The CS falling edge latches the

output address (A0, A1, A2). The CS rising edge latches level data (LVL).

33

LVL

Level Input. LVL determines whether the selected address is switched on or off. Logic-

high on LVL switches on the addressed output. A logic-low on LVL switches off the

addressed output.

44

A0

Digital Address 0 Input. (See Figure 3 for address mapping.)

55

A1

Digital Address 1 Input. (See Figure 3 for address mapping.)

66

A2

Digital Address 2 Input. (See Figure 3 for address mapping.)

77

GND

Ground

88

OUT8

Open-Drain Output 8. Connect OUT8 to the low side of a relay coil. This output is pulled

to PGND when activated, but otherwise is high impedance.

99

OUT7

Open-Drain Output 7. Connect OUT7 to the low side of a relay coil. This output is pulled

to PGND when activated, but otherwise is high impedance.

10, 16

10, 16

PGND

Power Ground. PGND is a return for the output sinks. Connect PGND pins together and

to GND.

11

11

OUT6

Open-Drain Output 6. Connect OUT6 to the low side of a relay coil. This output is pulled

to PGND when activated, but otherwise is high impedance.

12

12

OUT5

Open-Drain Output 5. Connect OUT5 to the low side of a relay coil. This output is pulled

to PGND when activated, but otherwise is high impedance.

MAX4822/MAX4823 Pin Description (continued)

MAX4824/MAX4825 Pin Description