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LM5032 Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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LM5032 Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 22 page Electrical Characteristics (Continued) Specifications with standard typeface are for T J = 25˚C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V externally applied, R T =RDCL = 42.2k Ω, UVLO = 1.5V, unless otherwise stated (Note 3) and (Note 4). Symbol Parameter Conditions Min Typ Max Units Oscillator (RT/SYNC Pin) F S1 Frequency 1 (at OUT1, OUT2) R T = 42.2 k Ω 183 200 217 kHz F S2 Frequency 2 (at OUT1, OUT2) R T = 13.7 k Ω 530 600 670 kHz DC voltage 2V Input Sync threshold 2.6 3.3 3.7 V PWM Controller (COMP1, COMP2, Duty Cycle Limit Pins) Delay to output COMP1 (COMP2) set to 2V. CS1 (CS2) stepped from 0 to 0.4V. Time for OUT1 (OUT2) to fall to 90% of VCC. Output load = 0 pF. 50 ns V COMP COMP1 (COMP2) open circuit voltage 5V I COMP COMP1 (COMP2) short circuit current COMP1 (COMP2) = 0V 0.6 1 1.4 mA COMP1 (COMP2) to PWM1 (PWM2) gain 0.33 V/V Minimum duty cycle SS1 (SS2) = 0V 0 % Maximum duty cycle 1 UVLO pin = 1.30V, R DCL =RT, COMP1 (COMP2) = open 76 % Maximum duty cycle 2 UVLO pin = 3.75V, R DCL =RT, COMP1 (COMP2) = open 20 % Maximum duty cycle 3 UVLO pin = 1.30V, R DCL =RT/4, COMP1 (COMP2) = open 20 % Maximum duty cycle 4 UVLO pin = 2.50V, R DCL =RT, COMP1 (COMP2) = open 50 % Maximum duty cycle 5 UVLO pin = 1.30V, R DCL =RT/2, COMP1 (COMP2) = open 40 % Slope compensation Delta increase at PWM comparator to CS1 (CS2) 90 mV Channel mismatch CS1 (CS2) = 0.25V 7 % Soft-start to COMP offset SS1 (SS2) = 0.8V 0 V Main Output Drivers (OUT1, OUT2) Output high voltage I OUT = 50mA (source) VCC-1 VCC-0.2 V Output low voltage I OUT = 100 mA (sink) 0.3 1 V Rise time C LOAD =1nF 12 ns Fall time C LOAD =1nF 10 ns Peak source current 1.5 A Peak sink current 2.5 A www.national.com 6 |
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